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Senior FPGA Engineer
Accepting applicationsNorthwood · Torrance, CA
Full-Time Principal ASICArmC++FPGAPython
Posted
6d ago
Category
Design
Experience
Principal
Country
United States
Northwood is on a mission to transform connectivity between Earth and space. Satellites are only as powerful as the ground systems that connect to them - without that critical infrastructure, they can’t be steered or send their data back to Earth. Northwood’s global ground network ensures that missions ranging from national security, to global connectivity, to disaster response can unlock their full potential and operate every day without fail. We take a vertically integrated approach to building an end-to-end ground system, delivering technology that is scalable and reliable for both government and commercial customers.
Backed by over $100M from investors like Andreessen Horowitz, Washington Harbour Partners, Alpine Space Ventures, Founders Fund, and others, Northwood has proven its ability to move fast – we’ve stood up a fully operational site in Australia in just 3 months, where similar efforts typically take years.
Northwood is rapidly scaling its global footprint, with 30+ sites planned across 2026 and 2027. We’re building and deploying infrastructure at a pace the industry hasn’t seen before. If you thrive on building quickly, solving hard problems, and seeing your work deployed globally on critical missions, we want you at Northwood.
SENIOR FPGA ENGINEER
Northwood is deploying a global network of phased array ground stations that will revolutionize how satellites communicate with Earth—delivering real-time, ultra-high-throughput connections that power everything from commercial ventures to national security missions. We need a Senior FPGA Engineer to architect the digital backbone of our antenna systems, pushing the boundaries of data transport and signal processing to handle massive parallel streams with rock-solid reliability. If you're excited by designing FPGA solutions for systems that track hundreds of satellites across orbits and process terabytes of space data in real time, this is your chance to lead the charge.
RESPONSIBILITIES:
Design core space-communication systems – Architect and implement networking and DSP blocks on FPGAs to process high-rate data from phased-array antennas and support reliable connectivity where traditional systems struggle.
Lead projects from concept to production – Work with cross-functional teams through prototyping, productization, deployment, and ongoing operations to ensure systems meet performance needs in demanding environments.
Develop system architecture – Assess trade-offs, define requirements, and optimize architectures for resilient, high-speed communication links that support global customers with minimal downtime.
Debug and improve deployed systems – Review field test data from global ground stations, identify hardware-software integration issues, and update designs to improve reliability and throughput.
BASIC QUALIFICATIONS:
5-10+ years of experience delivering complex digital hardware designs
Bachelor’s degree in Electrical Engineering or similar hardware-focused field
Strong Verilog/SystemVerilog skills for efficient, synthesizable designs
Python experience for automation, simulation, and system integration
Hands-on experience with FPGA-based DSP and/or networking
Experience with FPGA SoCs, including processors, peripherals, and custom logic
Proficiency with lab equipment (oscilloscopes, spectrum analyzers) for debugging high-speed FPGA designs
Onsite in Torrance
PREFERRED QUALIFICATIONS:
Proficiency with C++ or Rust - For embedded software that complements your FPGA work in performance-critical applications
Hands-on with high-performance PCBA architecture and design, including FPGA integration: You've architected boards that push the limits of speed, power, and reliability in demanding environments
COMPENSATION AND BENEFITS:
Senior FPGA Engineer/Level 3: $160,000 - $200,000 per year
Senior FPGA Engineer/Level 4: $160,000 - $200,000 per year
Senior FPGA Engineer/Level 5: $184,000 - $230,000 per year
Principal FPGA Engineer/Level 6: $230,000 - $275,000 per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on job-related knowledge, skills, education, and experience.
Base salary is just one part of your total rewards package at Northwood. You may also be eligible for equity in the form of stock options or other long-term incentives, as well as potential performance bonuses. We offer comprehensive medical, vision, and dental coverage, a 401(k) retirement plan, short- and long-term disability insurance, life insurance, paid parental leave, generous paid time off, and various other perks and discounts.
Additional Information
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Northwood is an Equal Opportunity Employer; employment with Northwood is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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Backed by over $100M from investors like Andreessen Horowitz, Washington Harbour Partners, Alpine Space Ventures, Founders Fund, and others, Northwood has proven its ability to move fast – we’ve stood up a fully operational site in Australia in just 3 months, where similar efforts typically take years.
Northwood is rapidly scaling its global footprint, with 30+ sites planned across 2026 and 2027. We’re building and deploying infrastructure at a pace the industry hasn’t seen before. If you thrive on building quickly, solving hard problems, and seeing your work deployed globally on critical missions, we want you at Northwood.
SENIOR FPGA ENGINEER
Northwood is deploying a global network of phased array ground stations that will revolutionize how satellites communicate with Earth—delivering real-time, ultra-high-throughput connections that power everything from commercial ventures to national security missions. We need a Senior FPGA Engineer to architect the digital backbone of our antenna systems, pushing the boundaries of data transport and signal processing to handle massive parallel streams with rock-solid reliability. If you're excited by designing FPGA solutions for systems that track hundreds of satellites across orbits and process terabytes of space data in real time, this is your chance to lead the charge.
RESPONSIBILITIES:
Design core space-communication systems – Architect and implement networking and DSP blocks on FPGAs to process high-rate data from phased-array antennas and support reliable connectivity where traditional systems struggle.
Lead projects from concept to production – Work with cross-functional teams through prototyping, productization, deployment, and ongoing operations to ensure systems meet performance needs in demanding environments.
Develop system architecture – Assess trade-offs, define requirements, and optimize architectures for resilient, high-speed communication links that support global customers with minimal downtime.
Debug and improve deployed systems – Review field test data from global ground stations, identify hardware-software integration issues, and update designs to improve reliability and throughput.
BASIC QUALIFICATIONS:
5-10+ years of experience delivering complex digital hardware designs
Bachelor’s degree in Electrical Engineering or similar hardware-focused field
Strong Verilog/SystemVerilog skills for efficient, synthesizable designs
Python experience for automation, simulation, and system integration
Hands-on experience with FPGA-based DSP and/or networking
Experience with FPGA SoCs, including processors, peripherals, and custom logic
Proficiency with lab equipment (oscilloscopes, spectrum analyzers) for debugging high-speed FPGA designs
Onsite in Torrance
PREFERRED QUALIFICATIONS:
Proficiency with C++ or Rust - For embedded software that complements your FPGA work in performance-critical applications
Hands-on with high-performance PCBA architecture and design, including FPGA integration: You've architected boards that push the limits of speed, power, and reliability in demanding environments
COMPENSATION AND BENEFITS:
Senior FPGA Engineer/Level 3: $160,000 - $200,000 per year
Senior FPGA Engineer/Level 4: $160,000 - $200,000 per year
Senior FPGA Engineer/Level 5: $184,000 - $230,000 per year
Principal FPGA Engineer/Level 6: $230,000 - $275,000 per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on job-related knowledge, skills, education, and experience.
Base salary is just one part of your total rewards package at Northwood. You may also be eligible for equity in the form of stock options or other long-term incentives, as well as potential performance bonuses. We offer comprehensive medical, vision, and dental coverage, a 401(k) retirement plan, short- and long-term disability insurance, life insurance, paid parental leave, generous paid time off, and various other perks and discounts.
Additional Information
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Northwood is an Equal Opportunity Employer; employment with Northwood is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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