Senior FPGA Design & Development Engineer – VHDL / DSP / Xilinx

Job Title: Senior FPGA Design & Development Engineer – VHDL / DSP / Xilinx
Location: Melbourne, FL
Work Arrangement: Hybrid – 3 Days Onsite / Week
Employment Type: Full-Time
Client: Aerospace
Industry Experience: Any industry accepted; Aerospace, Automotive, Defense, RF/Communications preferred ITAR Role

Position Overview
We are seeking a Senior FPGA Design & Development Engineer with strong experience in VHDL, DSP algorithm implementation, and Xilinx FPGA technologies. The ideal candidate will have hands-on experience developing FPGA-based digital signal processing solutions, performing hardware bring-up and debugging, and supporting system integration and validation.
Experience with RF, SDR, radar, communications, or other high-performance signal-processing systems is highly preferred.
Key Responsibilities
Design, develop, verify, and document FPGA-based digital systems using VHDL.
Implement and optimize DSP algorithms directly in FPGA hardware.
Develop and integrate designs using Xilinx FPGA architectures and development tools.
Use MATLAB for algorithm modeling, simulation, analysis, and design validation.
Perform FPGA board bring-up, hardware debugging, lab testing, and system validation.
Conduct timing analysis, timing optimization, and timing closure.
Support software, firmware, and overall system integration and testing activities.
Participate in design reviews and create detailed technical/design documentation.
Work with structured requirements, design, verification, and development processes.
Troubleshoot complex hardware/FPGA issues and collaborate with cross-functional engineering teams.
Required Qualifications
Strong professional experience in FPGA design and development using VHDL.
Hands-on experience implementing DSP algorithms in FPGA hardware.
Strong knowledge of Xilinx FPGA architectures and tools.
Experience with MATLAB modeling and simulation.
Experience with ModelSim or Questa simulation environments.
Hands-on experience with FPGA hardware bring-up and debugging.
Strong understanding of timing analysis and timing closure.
Experience working in a Linux development environment.
Experience with hardware lab testing and system integration.
Ability to capture requirements and produce detailed engineering/design documentation.
Preferred Experience
RF, Software Defined Radio (SDR), radar, or communications systems.
Aerospace, defense, automotive, or other safety/mission-critical engineering environments.
Experience working with complex FPGA-based embedded systems.
Experience with structured engineering development and verification processes.
Ideal Candidate
The ideal candidate is a hands-on senior FPGA engineer who can take a DSP algorithm from MATLAB modeling → FPGA/VHDL implementation → simulation → timing closure → hardware bring-up → lab validation → system integration.
If you have strong VHDL + DSP + Xilinx FPGA experience and enjoy working close to the hardware, we encourage you to apply.
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