IS
Senior Electrical Engineer - ASIC/FPGA Verification (Onsite)
Accepting applicationsIowa State University Research Park · Collins, IA
Full-Time Mid_senior ASICC++DFTFPGARTL
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
United States
Location: Cedar Rapids, IA
Job Description
We are seeking an experienced and driven Senior Electrical or Computer Engineer to play a key role in the design, implementation, and verification of advanced testbenches supporting high-performance digital ASICs and FPGAs. In this position, you will contribute to the development of cutting-edge signal processing and information assurance technologies that power critical Mission Systems capabilities, working alongside a highly collaborative Microelectronics Technology team at the forefront of innovation.
What You Will Do
Verification environment architecture and design using SystemVerilog with OVM/UVM
Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
Contribute to engineering estimates for new program pursuits.
Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
Qualifications You Must Have
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience
Active and transferable U.S. government issued security clearance is required prior to start date
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
ASIC/FPGA experience with RTL coding, simulation, and verification using VHDL and/or Verilog, including development of testbenches for RTL block verification using VHDL and/or SystemVerilog.
Working knowledge of chip-level verification methodologies and tools, including constrained-random verification, functional coverage, SystemVerilog, and revision control systems such as Git or Subversion.
Qualifications We Prefer
Ability to work independently and collaboratively in multidisciplinary engineering teams supporting fast-paced, milestone-driven programs
Strong written and verbal communication skills.
Experience with ASIC/FPGA lab validation, DFT and manufacturability concepts, Unix/Linux environments, scripting or C/C++, and industry-standard simulation and synthesis tools such as QuestaSim, Quartus, Synplify, or Vivado.
Show more Show less
Job Description
We are seeking an experienced and driven Senior Electrical or Computer Engineer to play a key role in the design, implementation, and verification of advanced testbenches supporting high-performance digital ASICs and FPGAs. In this position, you will contribute to the development of cutting-edge signal processing and information assurance technologies that power critical Mission Systems capabilities, working alongside a highly collaborative Microelectronics Technology team at the forefront of innovation.
What You Will Do
Verification environment architecture and design using SystemVerilog with OVM/UVM
Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
Contribute to engineering estimates for new program pursuits.
Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
Qualifications You Must Have
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience
Active and transferable U.S. government issued security clearance is required prior to start date
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
ASIC/FPGA experience with RTL coding, simulation, and verification using VHDL and/or Verilog, including development of testbenches for RTL block verification using VHDL and/or SystemVerilog.
Working knowledge of chip-level verification methodologies and tools, including constrained-random verification, functional coverage, SystemVerilog, and revision control systems such as Git or Subversion.
Qualifications We Prefer
Ability to work independently and collaboratively in multidisciplinary engineering teams supporting fast-paced, milestone-driven programs
Strong written and verbal communication skills.
Experience with ASIC/FPGA lab validation, DFT and manufacturability concepts, Unix/Linux environments, scripting or C/C++, and industry-standard simulation and synthesis tools such as QuestaSim, Quartus, Synplify, or Vivado.
Show more Show less
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