MT

Senior Digital Design Engineer(From Tier1 colleges like iits /NITs/IIITs)

Accepting applications

Mulya Technologies · Greater Hyderabad Area

Full-Time Mid_senior AICMOSDDRDFTPCIe
Estimated market salary
₹13-24 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
5d ago
Category
Design
Experience
Mid_senior
Country
India
Senior Digital Design Engineer
Location: Greater Bengaluru Area (Hybrid)/ Greater Hyderabad

we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

our architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.


. Location: Hyderabad/Bangalore
Department: Semiconductor Design Engineering
Experience Level: 5–10 Years Employment Type: Full-Time

About the Role We are seeking a talented Mid-Level Digital Design Engineer to contribute to the development of high-performance digital circuits for next-generation communication and memory interfaces.

The ideal candidate will have strong experience in high-speed digital design, semiconductor development flows, and cross-functional collaboration with verification and analog/mixed-signal teams.

Key Responsibilities  Define digital architecture concepts and specify analog-to-digital interfaces  Develop RTL for high-speed digital blocks and contribute to IP verification and basic DFT implementation  Perform logic synthesis and support timing analysis activities

 Design and verify high-performance digital circuits meeting area, timing, and power requirements  Develop block-level specifications based on system-level requirements  Collaborate closely with verification, physical implementation, and analog/mixed-signal engineering teams

 Analyse and implement high-speed serial protocols (e.g., USB4, PCIe)  Support post-silicon bring-up, debugging, characterization, and productization  Validate and test silicon in laboratory environments

Required Qualifications  B.E/B.Tech./B.S/M.E/M.Tech/M.S in Electrical Engineering, Electronics, Communications, VLSI, Microelectronics or related field  5–10 years of semiconductor industry experience in digital design

 Proven experience in high-speed digital circuit design using deep-submicron CMOS technologies  Experience designing digital circuits for multi-gigabit serial data-link transceivers, DDR, or high-performance memory interfaces

 Experience with industry-standard EDA tools for design, simulation, and verification  Strong background in complex digital system design and verification

Preferred Qualifications  Experience with Industry Standard design tools  Experience with multi-gigabit serial data transceivers  Exposure to analog/digital control interfaces  Knowledge of synthesis, static timing analysis (STA), and signal processing techniques

 Familiarity with verification methodologies and tools Technical Skills  RTL design expertise including CDC analysis and linting  Strong scripting and automation skills (Python preferred)

 Solid understanding of high-speed, low-power digital design techniques  Ability to translate system-level requirements into detailed digital implementations  Strong analytical, problem-solving, and debugging skills  EƯective communication and collaboration abilities

What We’re Looking For  Self-motivated engineer with strong ownership and accountability  Team-oriented mindset with ability to work in cross-functional environments  Passion for high-speed digital design and semiconductor innovation



Contact
Uday
muday_bhaskar@yahoo.com
Mulya Technologies
"Mining the Knowledge Community"
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