TG
Senior DFT / Staff DFT Engineer – Semiconductor / VLSI
Accepting applicationsThe Glove · Bengaluru, Karnataka, India
Full-Time Associate ATPGBoundary ScanCadenceDFTJTAG
Estimated market salary
₹44-79 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Test
Experience
Associate
Country
India
🚨 Hiring: Senior DFT / Staff DFT Engineer – Semiconductor / VLSI
📍 Location: Bangalore & Hyderabad
💼 Experience: 5-12
⏳ Notice Period: 30 to 60 Days
🔹 Mandatory Skills
✅ End-to-end DFT implementation
✅ Scan Insertion & Compression
✅ ATPG & Fault Models
✅ MBIST / LBIST
✅ JTAG / Boundary Scan – IEEE 1149.1
✅ DFT Sign-off & Fault Coverage
✅ RTL & SoC Design Flow
✅ STA / Timing Closure
✅ DFT Debugging
🔹 Tools & Scripting
Siemens Tessent | Synopsys TestMAX | Cadence Modus | VCS
TCL | Python | Perl
🎓 Qualification: B.E./B.Tech/M.E./M.Tech in ECE/EE/related discipline
📩 Interested candidates: Share your updated CV with relevant DFT experience [email protected]
Show more Show less
📍 Location: Bangalore & Hyderabad
💼 Experience: 5-12
⏳ Notice Period: 30 to 60 Days
🔹 Mandatory Skills
✅ End-to-end DFT implementation
✅ Scan Insertion & Compression
✅ ATPG & Fault Models
✅ MBIST / LBIST
✅ JTAG / Boundary Scan – IEEE 1149.1
✅ DFT Sign-off & Fault Coverage
✅ RTL & SoC Design Flow
✅ STA / Timing Closure
✅ DFT Debugging
🔹 Tools & Scripting
Siemens Tessent | Synopsys TestMAX | Cadence Modus | VCS
TCL | Python | Perl
🎓 Qualification: B.E./B.Tech/M.E./M.Tech in ECE/EE/related discipline
📩 Interested candidates: Share your updated CV with relevant DFT experience [email protected]
Show more Show less