M

Senior DFT Engineer

Accepting applications

MosChip® · Hyderabad, Telangana, India

Full-Time Mid_senior ATEDDRDFTFPGAMixed Signal
Estimated market salary
₹40-72 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
1d ago
Category
Design
Experience
Mid_senior
Country
India
Job Title: DFT Engineer


Hands-on Test Development experience (DFT, EDA tools, etc..
)Solid knowledge & experience in defining test solutions for multi-million gate SOC (Scan & MBIST) with Mixed Signal IPs (PLL, High Speed SERDES, DDR
)Knowledgeable in full SOC design and manufacturing cycle with specialized/direct experience in multiple areas; RTL/Custom Logic design, Synthesis, P&R, STA, Integration, Verification, Characterization and ATE tes
tStrong understanding of relationships between Hardware, Firmware and Software in FPGA and/or multi-processors SOC. Past experience in leading the team to successful silicon bring-up and problem solving in a complex syste
mStrong planning, project, and people management skills required. Must have experience developing managers and individual contributor
sExperienced hands-on technical manager not afraid to dig into details to provide technical direction • Proven track record of delivering results and meeting quality, cost, and time-to-market objective
sAbility to collaborate with overseas colleagues to define strategy, plan, and execute across the larger, global organizatio
nStakeholder influencing and people skills must be excellent
.Needs to be able to set aggressive goals and manage risks effectivel
yMust have a thorough understanding of tool development methodology
.Ability to manage software development tasks associated with specifying, developing, scheduling, and debugging according to current and future tool requirements
.MS or Ph.D. Engineering degree (EE or equivalent) with 3 to 10 years semiconductor industry experience

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