TI

Senior Design Verification Engineer

Accepting applications

ThunderSoft India Private Limited · Bengaluru, Karnataka, India

Full-Time Mid_senior ASICATEDFTPCIEPerl
Estimated market salary
₹24-44 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
21h ago
Category
Verification
Experience
Mid_senior
Country
India
Senior Design Verification Engineer
Location: Bangalore/Hyderabad
Exp- 5 -10 yrs
NP - 0-30 days
Job responsibilities:
· Create SoC Verification plan and develop C/SV/UVM based SoC verification tests
· Develop understanding on SoC Architecture and Test controller Architecture
· Develop SV / UVM based testcases for Test controller verification, MBIST verification and Functional vectors generation
Good understanding on Test controller / MBIST / DFT architecture
· Knowledge of industry standard interfaces, such as PCIE, LPDDR*, ONFI/NAND is desired.
· Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement
Proven experience in scripting languages such as Python / Perl / TCL
· Develop flows to automate verification environment development and drive team
· Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization

Interested candidates can share resume to neha.c@thundersoft.com
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