SC

Senior Design Verification Engineer

Accepting applications

Stovl Consulting · Bengaluru South, Karnataka, India

Full-Time Mid_senior AIARMC++DDRFPGA
Estimated market salary
₹27-49 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
12 Jun
Category
Verification
Experience
Mid_senior
Country
India
Stovl has evolved from data center services into end-to-end system lifecycle delivery, combining Product Engineering, Cloud Automation, Data Engineering, Artificial Intelligence, and Cybersecurity to build cohesive, operable platforms. We operate as a global delivery firm supporting customers across the US, India, and Singapore, serving fintech, insurance, SaaS, industrial IoT, and regulated enterprises.

Job Title: Senior Design Verification Engineer
Location: Bangalore (HSR)
Employment Type: Full-time
Skills:
• Degree: Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a closely related field.
• Tapeout Experience: 5+ years (10+ preferred) of experience working on advanced-node tapeouts at leading chip companies or fast-moving silicon startups. End-to-end silicon delivery experience is a strong plus.
• Verification Expertise: Deep expertise in verification/validation, emulation, and architectural- and system-level verification of industry-standard IPs.
• Subsystem Depth: Hands-on verification experience in at least one of the following areas:
o ARM/AMBA protocols
o CPU subsystems — boot, interrupts, debug, and coherency
o Memory controllers and PHYs — LPDDR/DDR interfaces and controller-level verification
o On-chip interconnects/NoCs — routing, arbitration, QoS, and bandwidth management
• Coding: Strong skills in SystemVerilog, UVM, and C/C++ for developing test environments. Python is strongly preferred.
• SoC-level DV experience, including bringing up full systems with memory controller + PHY + CPU connectivity and validating top-level integration.
• Deep experience with AMBA protocols, specifically ACE, for coherent CPU-memory access.
• FPGA prototyping experience (ideally using Xilinx Vivado/Vitis).
• Verification experience spanning multiple areas, including interconnects, CPU subsystems, ARM AMBA, memory controllers, and NPUs.

What We Offer
• Competitive salary and a meaningful equity stake
• A fast-paced startup environment with autonomy and visible impact
• Cutting-edge challenges at the intersection of AI and silicon design

Please share your resume at vinay.kumar@stovl.io
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