Senior Design Verification Engineer

We are looking for a Senior Engineer with strong expertise in LEC (Logical Equivalence Checking) and VCLP (Verification Coverage & Logic Proof) to join our team. This role requires the ability to handle complex LEC and VCLP tasks, including flow setup and execution, ensuring robust verification coverage and sign‑off quality.
Responsibilities
Own and drive LEC/VCLP flows for complex designs.
Set up, maintain, and optimize verification flows to ensure accuracy and efficiency.
Collaborate with cross‑functional teams to align verification strategies with design goals.
Provide technical leadership in debugging and resolving equivalence and coverage issues.
Deliver clear reporting and sign‑off metrics to project leadership.
Requirements
Strong, hands‑on expertise in LEC and VCLP methodologies.
Proven ability to set up and manage complex verification flows.
Solid understanding of digital design principles and verification strategies.
Excellent communication skills and ability to work across teams.
Nice to Have
Experience with advanced verification tools and methodologies.
Background in SoC/IP level verification.
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