SP
Senior Design Verification Engineer
Accepting applicationsSilicon Patterns · Hyderabad, Telangana, India
Full-Time Mid_senior DDREthernetPCIeSystemVerilogUVM
Estimated market salary
₹49-89 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
15 Jun
Category
Verification
Experience
Mid_senior
Country
India
We are looking for experienced Design Verification Engineers to join our team.
📍 Location: Bengaluru
💼 Experience: 5+ Years
Key Requirements:
✔️ Strong experience in Design Verification using SystemVerilog and UVM
✔️ Hands-on verification experience with high-speed protocols such as Ethernet, DDR, PCIe, and AXI5
✔️ Experience in testbench development, debugging, and coverage closure
✔️ Strong understanding of verification methodologies and protocol compliance
✔️ Experience with assertions, functional coverage, and verification planning
✔️ Excellent debugging and problem-solving skills
Show more Show less
📍 Location: Bengaluru
💼 Experience: 5+ Years
Key Requirements:
✔️ Strong experience in Design Verification using SystemVerilog and UVM
✔️ Hands-on verification experience with high-speed protocols such as Ethernet, DDR, PCIe, and AXI5
✔️ Experience in testbench development, debugging, and coverage closure
✔️ Strong understanding of verification methodologies and protocol compliance
✔️ Experience with assertions, functional coverage, and verification planning
✔️ Excellent debugging and problem-solving skills
Show more Show less