Senior Design Verification Engineer

We are looking for experienced Design Verification Engineers to join our team.
📍 Location: Bengaluru
💼 Experience: 5+ Years
Key Requirements:
✔️ Strong experience in Design Verification using SystemVerilog and UVM
✔️ Hands-on verification experience with high-speed protocols such as Ethernet, DDR, PCIe, and AXI5
✔️ Experience in testbench development, debugging, and coverage closure
✔️ Strong understanding of verification methodologies and protocol compliance
✔️ Experience with assertions, functional coverage, and verification planning
✔️ Excellent debugging and problem-solving skills

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