Senior Design Verification Engineer

Company Description Chiplogic Technologies (Chiplogic), founded in 2018, is an IP and product engineering services company specializing in semiconductors, systems, IoT, and AI/ML. The company delivers high-quality, dependable engineering services, including offshore development centers (ODC) and full turnkey semiconductor design from concept to silicon. Chiplogic also provides proof-of-concept (POC) development and complete IoT system solutions. Its AI/ML offerings are built around the proprietary VISARD™ (Video Synthesis And Real-time Dynamics) framework, enabling advanced video and real-time analytics applications. Team members work in a technology-driven environment focused on innovation, collaboration, and end-to-end ownership of complex designs.
Role Description As a Senior Design Verification Engineer, you will lead verification activities for complex digital designs, ensuring that RTL implementations meet functional and performance specifications. This is a full-time, on-site role based in Bengaluru. Your day-to-day responsibilities will include developing verification plans, creating and maintaining testbenches and test cases, and executing formal and functional verification methodologies. You will analyze coverage metrics, identify gaps, and drive improvements in verification quality and efficiency. The role also involves debugging design and verification issues, collaborating closely with RTL design, architecture, and validation teams, and mentoring junior engineers in best practices and methodology.
Qualifications
Strong expertise in Functional Verification, including testbench development, constrained-random testing, coverage-driven verification, and verification planning.
Hands-on experience in Formal Verification, with ability to write properties, analyze results, and complement simulation-based flows.
Solid background in RTL Design and Debugging, including reading and understanding RTL code, analyzing waveforms, and resolving design/verification mismatches.
Good understanding of Computer Architecture concepts such as pipelines, caches, memory subsystems, and standard on-chip protocols.
Proficiency with industry-standard verification tools and languages (e.g., SystemVerilog, UVM, simulation and formal tools from major EDA vendors).
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related field.
5+ years of relevant experience in ASIC/SoC design verification or a similar domain.
Strong analytical and problem-solving skills, with the ability to work independently and in cross-functional teams.
Effective written and verbal communication skills and a commitment to inclusive, collaborative work practices.
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