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Senior Design Verification Engineer

Accepting applications

ACL Digital · Bangalore Urban, Karnataka, India

Full-Time Mid_senior FPGASoCUVMVLSI
Estimated market salary
₹11-21 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
4d ago
Category
Verification
Experience
Mid_senior
Country
India
We’re Hiring: Design Verification Engineers (Pune) 🚀

ACL Digital is growing its Design Verification team in Pune! We are currently looking for skilled DV Engineers to join our team and work on cutting-edge FPGA and SoC projects.

Key Requirements:
Experience: 3+ years in Design Verification
Location: Pune (On-site)
Notice Period: Looking for immediate joiners (0–15 days preferred)

If you are passionate about building scalable UVM environments and driving tape-out success, we want to hear from you.

Interested candidates, please reach out via anusha.prakash@acldigital.com or drop your resume in the comments. Let’s connect!

#Hiring #VLSI #DesignVerification #DVEngineer #PuneJobs #ACLDigital #SemiconductorJobs
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