Senior Compiler Engineer

About Company

Anthriq is a signal processing infrastructure company. We build the full acquisition and compute stack for human-aware technology from custom analog front-end IP that captures biosignals at the source, to signal-first compute systems built for time-critical workloads.

About The Role

We're looking for a Senior Compiler Engineer to own the system software stack that sits between Anthriq Silicon and the applications running on it, compiler infrastructure, low-level firmware, and real-time signal compute pipelines with sub-millisecond latency requirements. The ideal candidate has shipped production LLVM compiler pipelines at a semiconductor company, has hands-on embedded bring-up experience, and brings formal verification rigour to safety-critical real-time systems.

What You'll Do

Own custom LLVM backend passes, instruction selection (SelectionDAG / GlobalISel), MIR-level optimizations, and register allocator improvements for real-time execution paths
Build compiler fuzzing infrastructure and formal verification frameworks (Alive2 / SMT), with zero miscompilations in safety-critical pipelines
Implement device drivers and protocol stacks (USB, SPI, I2C, UART, PCIe, CAN) for real-time biosignal acquisition
Work with Linux kernel subsystems, RT-PREEMPT, SCHED_FIFO, and kernel modules for deterministic biosignal scheduling
Profile and optimize across CPU / GPU architectures using perf, gdb, Nsight, rocprof, valgrind, and eBPF
Author SRDs and SDDs; lead design reviews and mentor engineers across C++, LLVM, and embedded systems
Collaborate with hardware teams on silicon bring-up and BSP development ahead of tape-out

What We're Looking For

10+ years in system-level C++ spanning GPU compiler engineering, embedded firmware, and kernel-adjacent work
Deep LLVM expertise: SelectionDAG, GlobalISel, MIR, register allocator, TableGen, custom pass development.
GPU programming: CUDA / HIP; GPU execution model expertise (warp scheduling, register files, occupancy)
Compiler correctness: fuzzing harnesses, formal verification (Alive2, SMT/SAT), differential testing
Advanced debugging: gdb, Lauterbach JTAG, logic/protocol analyzers, AddressSanitizer
M.E. / M.S. in CS, Embedded Systems, or related field

Bonus

FPGA design (Verilog / VHDL) and assembly-level programming (PTX, GCN, SASS, x86, 8051)

Skills: microprocessors,compiler optimization,llvm,gpu,cpu design,compilers,infrastructure,c++,cuda
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