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Senior ASIC Design Engineer
Accepting applicationsNokia · Bengaluru, Karnataka, India
Full-Time Mid_senior AIASICPerlPythonRTL
Estimated market salary
₹22-40 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
India
Job Description
In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise
Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.
Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.
Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
How You Will Contribute And What You Will Learn
As a member of the ASIC design team, you will play the role to automate cad flows for ASIC design
The candidate:
Develops and maintains key common RTL IP modules used at every product generation
Interacts with RTL designers to understand the flow of work, develops the architecture to automate the flow and then implements the automation to eliminate pain points and errors to de-risk projects.
Develop Synthesis flows and run synthesis along side with other designers and provide feedback to designers to improve timing and power.
Develops scripts to automate using Python, Perl or other scripting languages.
Works as part of a methodology team to develop new CAD/methodologies or flows which improve quality of design, reduce design time and provide consistent and reliable results across users and sites and streamline the process of ASIC development.
Identifies input variables, categorizing them as fixed or customizable or user controllable options allowing users to have simplified interaction with the tool flow.
Identifies scope for improvement in existing flows and implement those improvements.
Work with experts and users across sites to identify new methodologies for development and adoption.
Works with EDA tool vendors to identify options available across tools which reduce debug and development effort. Takes the options and make them available in a simplified way to design engineers.
Works with EDA tool vendors to evaluate new tools and new features.
Develops flows, take it through a proof-of-concept on a project and release the flow for production use across teams and sites.
Makes presentations to teams to ramp users about improvements or new flow development.
Works on EDA tool installation and support, compute platform support, LSF job submittal support, infrastructure related support for worldwide ASIC design community.Works closely with IT and debug and implement solutions.Continuously monitor/improve CAD infrastructure efficiency and CAD automation.
The job is a high visibility job and has the potential to improve and impact the work of multiple engineers across geographies.
Key Skills And Experience
Hold a Bachelor or master’s degree in electrical or computer engineering
Have a minimum 5 years of experience with relevant experience
Have a minimum 2 years of RTL design experience
Strong experience in Synthesis, STA and constraints development
Strong working experience of Shell, Perl, TCL and other programming/scripting language
Strong problem-solving skills
Good verbal/written communication skills and teamwork
Knowledge of Synopsys Electronic Design Automation (EDA) tools an asset
Knowledge of Verilog or System Verilog
Knowledge of LSF
Knowledge of machine learning and/or neural networks may be an asset
About The Team
Some of our benefits in India:
Flexible and hybrid working arrangements to support work–life balance
Health and well-being support – medical insurance for you and your family, health check-ups, life and accident insurance, well-being programs, and employee resource groups
A minimum of 90 days of Maternity and Paternity Leave based on eligibility
Personal Support Service 24/7 – a confidential support channel open to all Nokia employees and their families in challenging situations
Career growth & mobility – technical career paths, job rotations, international assignments, and relocation support
Continuous learning – technical certifications, mentoring programs, coaching, and digital learning platforms
Opportunities to innovate and contribute through Nokia’s research and development environment
Recognition programs that celebrate outstanding contributions
Workplace support – ergonomic working support and mobile device programs based on eligibility
Show more Show less
In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise
Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.
Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.
Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
How You Will Contribute And What You Will Learn
As a member of the ASIC design team, you will play the role to automate cad flows for ASIC design
The candidate:
Develops and maintains key common RTL IP modules used at every product generation
Interacts with RTL designers to understand the flow of work, develops the architecture to automate the flow and then implements the automation to eliminate pain points and errors to de-risk projects.
Develop Synthesis flows and run synthesis along side with other designers and provide feedback to designers to improve timing and power.
Develops scripts to automate using Python, Perl or other scripting languages.
Works as part of a methodology team to develop new CAD/methodologies or flows which improve quality of design, reduce design time and provide consistent and reliable results across users and sites and streamline the process of ASIC development.
Identifies input variables, categorizing them as fixed or customizable or user controllable options allowing users to have simplified interaction with the tool flow.
Identifies scope for improvement in existing flows and implement those improvements.
Work with experts and users across sites to identify new methodologies for development and adoption.
Works with EDA tool vendors to identify options available across tools which reduce debug and development effort. Takes the options and make them available in a simplified way to design engineers.
Works with EDA tool vendors to evaluate new tools and new features.
Develops flows, take it through a proof-of-concept on a project and release the flow for production use across teams and sites.
Makes presentations to teams to ramp users about improvements or new flow development.
Works on EDA tool installation and support, compute platform support, LSF job submittal support, infrastructure related support for worldwide ASIC design community.Works closely with IT and debug and implement solutions.Continuously monitor/improve CAD infrastructure efficiency and CAD automation.
The job is a high visibility job and has the potential to improve and impact the work of multiple engineers across geographies.
Key Skills And Experience
Hold a Bachelor or master’s degree in electrical or computer engineering
Have a minimum 5 years of experience with relevant experience
Have a minimum 2 years of RTL design experience
Strong experience in Synthesis, STA and constraints development
Strong working experience of Shell, Perl, TCL and other programming/scripting language
Strong problem-solving skills
Good verbal/written communication skills and teamwork
Knowledge of Synopsys Electronic Design Automation (EDA) tools an asset
Knowledge of Verilog or System Verilog
Knowledge of LSF
Knowledge of machine learning and/or neural networks may be an asset
About The Team
Some of our benefits in India:
Flexible and hybrid working arrangements to support work–life balance
Health and well-being support – medical insurance for you and your family, health check-ups, life and accident insurance, well-being programs, and employee resource groups
A minimum of 90 days of Maternity and Paternity Leave based on eligibility
Personal Support Service 24/7 – a confidential support channel open to all Nokia employees and their families in challenging situations
Career growth & mobility – technical career paths, job rotations, international assignments, and relocation support
Continuous learning – technical certifications, mentoring programs, coaching, and digital learning platforms
Opportunities to innovate and contribute through Nokia’s research and development environment
Recognition programs that celebrate outstanding contributions
Workplace support – ergonomic working support and mobile device programs based on eligibility
Show more Show less