SI
Senior Applications Engineer-PDN/STA/ECO/PrimeTime/PrimeClosure/RHSC
Accepting applicationsSynopsys Inc · Noida, Uttar Pradesh, India
Full-Time Mid_senior AISoCSynopsys
Estimated market salary
₹21-37 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Eda
Experience
Mid_senior
Country
India
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You thrive on being the person everyone calls when a design challenge gets thorny and the clock is ticking. When someone mentions 7nm or 3nm, you picture the stackup, the signoff flows, the real-world challenges -then you start mapping solutions. You have sat with PrimeTime logs at midnight, chased down PDN or EMIR anomalies, and know that “timing closure” is more than a checklist item. You like the mix of deep technical troubleshooting and talking directly to the engineers who build the next big thing. You are all about translating a customer’s pain into product improvements, and you want to see your fingerprints on both the tools and the success stories. Presenting to a room full of experts, running a webinar, or writing a killer FAQ all feel natural to you. You keep learning, because every new node, every new platform, is a puzzle you want to solve. You want your work to be visible and valuable, not just to your team, but to the world’s top semiconductor companies.
What You'll Be Doing
Partnering with global customers, IP providers, and foundries to understand and address design challenges on advanced SoCs and 3DICs at 7/5/3nm nodes
Delivering technical support and solutions for power integrity (PDN/EMIR), static timing analysis (STA), and reliability signoff using tools like RHSC, PrimeTime, and PrimeClosure/PTECO/Tweaker
Collaborating with Synopsys product development teams to define and shape EDA product specifications based on real customer feedback
Deploying and enabling Synopsys-Seascape, the big-data design platform, in customer environments to solve chip-package-system challenges
Leading technical engagements, including webinars, presentations, and direct consultations, to guide customers through complex design and signoff workflows
Owning the end-to-end customer technical experience, from troubleshooting issues to gathering requirements and driving product improvements
Documenting best practices, creating FAQs, and contributing to internal knowledge bases to elevate team and customer success
The Impact You Will Have
Accelerate customer tapeouts and design cycles by resolving critical signoff and timing closure issues before they become blockers
Enable top semiconductor companies to adopt and maximize Synopsys EDA solutions for the most advanced process nodes
Influence the development of next-generation signoff tools by translating real-world customer needs into actionable product features
Reduce support cycles and increase customer satisfaction by delivering clear, effective technical communication and resources
Help shape industry best practices for timing, power, and reliability analysis through your direct customer interactions and documentation
Drive adoption of Synopsys-Seascape and other advanced platforms in high-stakes design environments
Contribute to the team’s reputation as the go-to experts for solving the hardest design challenges in the business
What You'll Need
Minimum 3 years of experience in the semiconductor industry, with at least 2 years focused on PDN/EMIR engineering, STA analysis, ECO, or physical verification/timing closure for block or SoC-level designs
Hands-on experience with RHSC, PrimeTime, and PrimeClosure/PTECO/Tweaker tools
Demonstrated competence in technical support, troubleshooting, and resolving customer issues related to PDN and/or timing signoff
Familiarity with STA, place and route (PnR), DRC, and LVS processes is a plus
Strong programming skills to automate flows and analyze data
Excellent written and verbal communication skills, including the ability to run webinars and present to customers
Ability to manage multiple complex projects and adapt quickly to new technologies and customer needs
Who You Are
You can break down a failed signoff run for a customer, isolate the root cause, and explain the fix in plain language that builds trust
You keep the big picture in mind, connecting customer problems with product roadmaps and the needs of the engineering team
You are comfortable facilitating technical sessions, from small group troubleshooting to large customer webinars
You document your solutions and share knowledge, making it easier for others to solve similar challenges next time
You thrive on juggling priorities, never losing track of a critical customer issue while still pushing for the next product improvement
You keep learning, always looking for new tools, flows, and process insights to stay ahead of the curve
The Team You'll Be Part Of
Signoff Support Group which is responsible for deploying and supporting the broad products portfolio of Synopsys' design analysis and signoff solutions for static timing analysis, advanced signal integrity, power and power integrity, parasitic extraction, ECO closure, transistor-level analysis and library characterization, and Multiphysics.
Rewards And Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Show more Show less
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You thrive on being the person everyone calls when a design challenge gets thorny and the clock is ticking. When someone mentions 7nm or 3nm, you picture the stackup, the signoff flows, the real-world challenges -then you start mapping solutions. You have sat with PrimeTime logs at midnight, chased down PDN or EMIR anomalies, and know that “timing closure” is more than a checklist item. You like the mix of deep technical troubleshooting and talking directly to the engineers who build the next big thing. You are all about translating a customer’s pain into product improvements, and you want to see your fingerprints on both the tools and the success stories. Presenting to a room full of experts, running a webinar, or writing a killer FAQ all feel natural to you. You keep learning, because every new node, every new platform, is a puzzle you want to solve. You want your work to be visible and valuable, not just to your team, but to the world’s top semiconductor companies.
What You'll Be Doing
Partnering with global customers, IP providers, and foundries to understand and address design challenges on advanced SoCs and 3DICs at 7/5/3nm nodes
Delivering technical support and solutions for power integrity (PDN/EMIR), static timing analysis (STA), and reliability signoff using tools like RHSC, PrimeTime, and PrimeClosure/PTECO/Tweaker
Collaborating with Synopsys product development teams to define and shape EDA product specifications based on real customer feedback
Deploying and enabling Synopsys-Seascape, the big-data design platform, in customer environments to solve chip-package-system challenges
Leading technical engagements, including webinars, presentations, and direct consultations, to guide customers through complex design and signoff workflows
Owning the end-to-end customer technical experience, from troubleshooting issues to gathering requirements and driving product improvements
Documenting best practices, creating FAQs, and contributing to internal knowledge bases to elevate team and customer success
The Impact You Will Have
Accelerate customer tapeouts and design cycles by resolving critical signoff and timing closure issues before they become blockers
Enable top semiconductor companies to adopt and maximize Synopsys EDA solutions for the most advanced process nodes
Influence the development of next-generation signoff tools by translating real-world customer needs into actionable product features
Reduce support cycles and increase customer satisfaction by delivering clear, effective technical communication and resources
Help shape industry best practices for timing, power, and reliability analysis through your direct customer interactions and documentation
Drive adoption of Synopsys-Seascape and other advanced platforms in high-stakes design environments
Contribute to the team’s reputation as the go-to experts for solving the hardest design challenges in the business
What You'll Need
Minimum 3 years of experience in the semiconductor industry, with at least 2 years focused on PDN/EMIR engineering, STA analysis, ECO, or physical verification/timing closure for block or SoC-level designs
Hands-on experience with RHSC, PrimeTime, and PrimeClosure/PTECO/Tweaker tools
Demonstrated competence in technical support, troubleshooting, and resolving customer issues related to PDN and/or timing signoff
Familiarity with STA, place and route (PnR), DRC, and LVS processes is a plus
Strong programming skills to automate flows and analyze data
Excellent written and verbal communication skills, including the ability to run webinars and present to customers
Ability to manage multiple complex projects and adapt quickly to new technologies and customer needs
Who You Are
You can break down a failed signoff run for a customer, isolate the root cause, and explain the fix in plain language that builds trust
You keep the big picture in mind, connecting customer problems with product roadmaps and the needs of the engineering team
You are comfortable facilitating technical sessions, from small group troubleshooting to large customer webinars
You document your solutions and share knowledge, making it easier for others to solve similar challenges next time
You thrive on juggling priorities, never losing track of a critical customer issue while still pushing for the next product improvement
You keep learning, always looking for new tools, flows, and process insights to stay ahead of the curve
The Team You'll Be Part Of
Signoff Support Group which is responsible for deploying and supporting the broad products portfolio of Synopsys' design analysis and signoff solutions for static timing analysis, advanced signal integrity, power and power integrity, parasitic extraction, ECO closure, transistor-level analysis and library characterization, and Multiphysics.
Rewards And Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Show more Show less