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Senior Analog IC Layout Engineer
Accepting applicationsIntellectt Inc · San Jose, CA
Contract Mid_senior AnalogCMOSCadenceCalibreCmos
Posted
15 Jun
Category
Design
Experience
Mid_senior
Country
United States
Job Title: Senior Analog & Mixed-Signal Layout Engineer
Location: San Jose, CA (100% Onsite – 5 Days/Week)
Client: Broadcom INC
Duration : 12 Months Plus Extension
Additional skills: AMS, Serdes, Finfet, Cmos, PLL, TIA, Cadence Virtuos
oThey MUST have full-custom Layout experience
.Job Descriptio
nSeeking an experienced Analog & Mixed-Signal Layout Engineer with strong full-custom layout expertise. The candidate will work independently on block-level and IP-level analog layout design, collaborating with circuit designers, mask designers, and remote layout teams
.
Requiremen
tsBachelor's degree in Electrical Engineering or related fiel
d.Preference for candidates with TSMC 7nm and 5nm process node experience; work will support advanced 2nm–3nm technologies
.6–8+ years of hands-on Analog/RF Layout experienc
e.Strong full-custom layout experience is require
d.Experience with high-frequency analog and high-speed custom digital layouts where parasitic minimization is critica
l.Ability to implement power/ground networks, critical device matching, sensitive signal routing, and understand hierarchical layout impact
s.Good understanding of ESD concepts and guard ring implementation for design isolatio
n.Experience with Cadence Virtuoso and Calibre LVS/DRC tool
s.FinFET layout experience is require
d.Strong understanding of deep sub-micron analog layout concepts and semiconductor fabrication processe
s.Experience with AMS, SerDes, CMOS, PLL, and TIA design
s.Experience with ADCs/DACs and PLL layouts is a plu
s.Basic Unix scripting knowledge is a plu
s.Strong communication skills with the ability to collaborate effectively across geographically distributed team
s.
Show more Show less
Location: San Jose, CA (100% Onsite – 5 Days/Week)
Client: Broadcom INC
Duration : 12 Months Plus Extension
Additional skills: AMS, Serdes, Finfet, Cmos, PLL, TIA, Cadence Virtuos
oThey MUST have full-custom Layout experience
.Job Descriptio
nSeeking an experienced Analog & Mixed-Signal Layout Engineer with strong full-custom layout expertise. The candidate will work independently on block-level and IP-level analog layout design, collaborating with circuit designers, mask designers, and remote layout teams
.
Requiremen
tsBachelor's degree in Electrical Engineering or related fiel
d.Preference for candidates with TSMC 7nm and 5nm process node experience; work will support advanced 2nm–3nm technologies
.6–8+ years of hands-on Analog/RF Layout experienc
e.Strong full-custom layout experience is require
d.Experience with high-frequency analog and high-speed custom digital layouts where parasitic minimization is critica
l.Ability to implement power/ground networks, critical device matching, sensitive signal routing, and understand hierarchical layout impact
s.Good understanding of ESD concepts and guard ring implementation for design isolatio
n.Experience with Cadence Virtuoso and Calibre LVS/DRC tool
s.FinFET layout experience is require
d.Strong understanding of deep sub-micron analog layout concepts and semiconductor fabrication processe
s.Experience with AMS, SerDes, CMOS, PLL, and TIA design
s.Experience with ADCs/DACs and PLL layouts is a plu
s.Basic Unix scripting knowledge is a plu
s.Strong communication skills with the ability to collaborate effectively across geographically distributed team
s.
Show more Show less
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