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Senior Analog Design Engineer

Accepting applications

NXP · Caen, France, Europe

Full-Time Senior AnalogCMOSCadenceMentorPerl
Posted
1h ago
Category
Design
Experience
Senior
Country
France

Job Summary:

NXP Semiconductors France is seeking a highly skilled and experienced Senior Analog Design Engineer to contribute to the design and development of innovative analog and mixed-signal integrated circuits for various high-performance applications. This role involves leading complex design tasks, mentoring junior engineers, and ensuring the delivery of robust and high-quality designs.

Job Responsibilities:

  • Lead the architectural definition, design, simulation, and verification of analog and mixed-signal blocks such as ADCs, DACs, PLLs, LDOs, amplifiers, and high-speed interfaces.
  • Perform detailed circuit design using advanced CMOS technologies, ensuring performance, power, and area targets are met.
  • Conduct extensive simulations (e.g., Spectre, Eldo) to characterize circuit behavior across various operating conditions and corners.
  • Collaborate with digital design, layout, test, and system engineering teams throughout the product development lifecycle.
  • Develop comprehensive test plans and support silicon validation and characterization activities.
  • Analyze and debug silicon issues, propose and implement corrective actions.
  • Mentor and provide technical guidance to junior analog design engineers.
  • Contribute to design reviews, technical documentation, and patent disclosures.
  • Stay updated with the latest industry trends, design methodologies, and tools.


Job Qualifications:

  • Master's degree or Ph.D. in Electrical Engineering or a related field.
  • Minimum of 7 years of relevant experience in analog/mixed-signal IC design.
  • Proven track record of successfully designing, taping out, and validating complex analog blocks in advanced CMOS processes (e.g., 28nm, 16nm, 7nm).
  • Expertise in various analog circuit topologies and design techniques.
  • Strong proficiency with industry-standard EDA tools (Cadence Virtuoso, Spectre, AMS simulation, etc.).
  • Solid understanding of semiconductor device physics and process variations.
  • Experience with layout supervision and post-layout verification (LVS, DRC, parasitic extraction).
  • Excellent analytical, problem-solving, and debugging skills.
  • Ability to work independently and as part of a multi-site, multi-cultural team.
  • Strong communication and presentation skills in English.
  • Experience with scripting languages (e.g., Python, Perl) is a plus.

More information about NXP in France...

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