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Senior Analog Circuit Design Engineer
Accepting applicationsACL Digital · Bengaluru, Karnataka, India
Full-Time Mid_senior Analog DesignTransistor-levelCircuit SimulationSPICECadence
Estimated market salary
₹11-21 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
4d ago
Category
Verification
Experience
Mid_senior
Country
India
Job Title:Senior Analog Circuit Design Engineer:
Exp Level:4+yrs
Location: Banglaore
Job Description:
. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute o
Key Responsibilities
Circuit Design & Implementation: Design, simulate, and optimize complex analog and mixed-signal integrated circuits (ICs) at the transistor level.
IP Blocks Ownership: Develop and own core building blocks such as [LDOs, Bandgap References (BGR), Op-Amps, Comparators, Charge Pumps, ADCs/DACs, PLLs, or Oscillators] based on company requirements.
Simulation & Verification: Perform extensive pre-layout and post-layout verification across PVT (Process, Voltage, Temperature) corners, Monte Carlo analysis, and reliability flows (EMIR, aging, and electro-thermal effects).
Layout Supervision: Work closely with physical layout engineers to guide floorplanning, matching strategies, parasitic minimization, and noise isolation techniques.
Cross-Functional Collaboration: Partner with Digital Design, Verification, and System teams to ensure flawless top-level integration and mixed-signal design closure.
Silicon Validation: Support post-silicon bring-up, bench characterization, and debugging activities to map silicon performance back to simulation models
Interested can share Cv to Sharmila.b@acldigital.com along with the details:
Years of experience :
Relevant years of Experience:
Current CTC:
Expected CTC:
Anyoffers in hand:
Notice period:
Show more Show less
Exp Level:4+yrs
Location: Banglaore
Job Description:
. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute o
Key Responsibilities
Circuit Design & Implementation: Design, simulate, and optimize complex analog and mixed-signal integrated circuits (ICs) at the transistor level.
IP Blocks Ownership: Develop and own core building blocks such as [LDOs, Bandgap References (BGR), Op-Amps, Comparators, Charge Pumps, ADCs/DACs, PLLs, or Oscillators] based on company requirements.
Simulation & Verification: Perform extensive pre-layout and post-layout verification across PVT (Process, Voltage, Temperature) corners, Monte Carlo analysis, and reliability flows (EMIR, aging, and electro-thermal effects).
Layout Supervision: Work closely with physical layout engineers to guide floorplanning, matching strategies, parasitic minimization, and noise isolation techniques.
Cross-Functional Collaboration: Partner with Digital Design, Verification, and System teams to ensure flawless top-level integration and mixed-signal design closure.
Silicon Validation: Support post-silicon bring-up, bench characterization, and debugging activities to map silicon performance back to simulation models
Interested can share Cv to Sharmila.b@acldigital.com along with the details:
Years of experience :
Relevant years of Experience:
Current CTC:
Expected CTC:
Anyoffers in hand:
Notice period:
Show more Show less