Senior AMS Verification Engineer

We are hiring Analog Mixed-Signal (AMS) Verification Engineers for semiconductor design and verification assignments involving complex analog and mixed-signal IPs. The role requires strong fundamentals in mixed-signal design, hands-on experience with Verilog-AMS and Real Number Modeling (RNM), and expertise in verification and debugging of blocks such as ADC, DAC and PLL.
Candidates should have practical experience with the Cadence mixed-signal verification environment, including Virtuoso, ADE Assembler and Xcelium.
Key Responsibilities
Develop and execute verification strategies for Analog Mixed-Signal (AMS) designs.
Create and maintain Analog Mixed-Signal behavioral models using Verilog-AMS.
Develop and validate Real Number Models (RNM) for analog and mixed-signal blocks.
Perform functional verification of ADC, DAC, PLL and other mixed-signal IPs.
Develop verification environments and test scenarios for analog/mixed-signal functionality.
Work with Cadence Virtuoso, ADE Assembler and Xcelium for simulation and verification.
Perform detailed mixed-signal waveform analysis and debugging.
Analyze simulation failures and identify design, modeling or verification issues.
Perform verification coverage analysis and identify coverage gaps.
Work closely with analog designers and verification engineers to resolve functional issues.
Maintain verification models, test cases and regression environments.
Support verification closure through debugging, regression analysis and coverage review.
Required Qualifications
B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical Engineering, VLSI, Microelectronics or a related discipline.
Minimum 3 years of relevant hands-on AMS Verification experience.
Strong understanding of analog and mixed-signal design fundamentals.
Good understanding of common analog building blocks and their behavior.
Hands-on experience with Verilog-AMS and Real Number Modeling.
Practical experience in verification of ADC, DAC, PLL and mixed-signal blocks.
Experience with Cadence mixed-signal simulation and verification tools.
Technical Skills
AMS Verification
Analog Mixed-Signal Verification
Mixed-Signal Simulation
AMS Verification Methodology
Mixed-Signal Testbench Development
Verification Coverage Analysis
Modeling
Verilog-AMS
Real Number Modeling (RNM)
Analog Behavioral Modeling
Mixed-Signal Behavioral Models
Analog / Mixed-Signal IP
ADC Verification
DAC Verification
PLL Verification
Analog Building Blocks
Mixed-Signal Interfaces
EDA Tools
Cadence Virtuoso
Cadence ADE Assembler
Cadence Xcelium
Cadence Mixed-Signal Design Environment
Debug & Analysis
Mixed-Signal Waveform Analysis
Simulation Debugging
Regression Debugging
Coverage Analysis
Root-Cause Analysis

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