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RTL Engineer (BB810FT RM 4239)
Accepting applicationsSource-Right · Bengaluru, Karnataka, India
Full-Time Senior VerilogPCIeRTL DesignSynthesis
Estimated market salary
₹22-40 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Design
Experience
Senior
Country
India
Position: RTL Engineer (BB810FT RM 4239)
Requirements
8–10 years of RTL design experience.
Proven expertise in PCIe Gen5–Gen8.
Strong debugging and problem-solving skills.
Ability to work in a hybrid model from Bangalore.
Job Description
We are seeking an experienced RTL Engineer with strong expertise in PCIe Gen5 to Gen8. The candidate will be responsible for design, development, and verification of PCIe RTL blocks, ensuring compliance with industry standards and seamless integration with system architectures.
Key Responsibilities
Design and implement RTL for PCIe Gen5–Gen8.
Optimize and validate PCIe protocol-level functionality.
Debug and resolve issues related to PCIe communication.
Collaborate with hardware and system teams for integration.
Ensure design meets performance, timing, and compliance requirements.
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Requirements
8–10 years of RTL design experience.
Proven expertise in PCIe Gen5–Gen8.
Strong debugging and problem-solving skills.
Ability to work in a hybrid model from Bangalore.
Job Description
We are seeking an experienced RTL Engineer with strong expertise in PCIe Gen5 to Gen8. The candidate will be responsible for design, development, and verification of PCIe RTL blocks, ensuring compliance with industry standards and seamless integration with system architectures.
Key Responsibilities
Design and implement RTL for PCIe Gen5–Gen8.
Optimize and validate PCIe protocol-level functionality.
Debug and resolve issues related to PCIe communication.
Collaborate with hardware and system teams for integration.
Ensure design meets performance, timing, and compliance requirements.
Show more Show less