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RTL Design Lead - IP Design

Accepting applications

AMD · Bengaluru, Karnataka, India

Full-Time Mid_senior AIDFTPower ManagementRTLSOC
Estimated market salary
₹20-36 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
12 Jun
Category
Design
Experience
Mid_senior
Country
India
WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

SMTS SILICON DESIGN ENGINEER

The Role

As a member of the Computing and Graphics Group, you will help bring to life cutting-edge designs. You will lead a front-end design and integration team, working closely with architecture, design verification, physical design, and product engineers to achieve first pass silicon success.

The Person

The ideal candidate will have experience leading teams and developing RTL for SoC subsystems from architectural specification to silicon. Responsibilities include IP and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team.

Key Responsiblities

Design of IP and subsystems with integration of AMD and other 3rd party IPs
Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs
Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up


Preferred Experience

8-12 years full-time experience in IP hardware design
Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
Clock domain crossing (CDC) tools
Detailed understanding of SoC design flows
Understanding of IP/SS/SoC Power Management techniques – Power Gating, Clock Gating
Experience with embedded processors and data fabric architectures (NoC)
Outstanding interaction skills while communicating both written and verbally
Ability to work with multi-level functional teams across various geographies
Outstanding problem-solving and analytical skills


Academic Credentials

Bachelors degree in Computer Engineering/Electrical Engineering plus 12 years full-time experience in IP hardware design, or Masters degree plus 8 years experience in same.


Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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