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RTL Design Engineer
Accepting applicationsUST · Bengaluru, Karnataka, India
Full-Time Mid_senior ASICC++DDREthernetFPGA
Posted
6d ago
Category
Design
Experience
Mid_senior
Country
India
Job Title: RTL Design Engineer
Experience: 7+ Years
Location: Bengaluru
Job Overvie
wWe are looking for a highly skilled RTL Design Engineer with strong expertise in FPGA development and embedded firmware. The candidate will be responsible for designing, implementing, and validating digital logic systems and working closely with system architects, hardware teams, and software engineers to deliver high-performance solutions
.
Key Responsibiliti
esRTL Design & Developme
ntDesign and develop RTL (Verilog/SystemVerilog/VHDL) for FPGA/ASIC-based syste
msImplement high-speed digital circuits, pipelines, and interfac
esPerform functional simulation, debugging, and verification of RTL desig
nsOptimize designs for timing, area, and power constrain
ts
FPGA Developm
entWork with FPGA platforms such as Xilinx, Intel (Altera), or Latt
iceImplement and debug IP cores, interfaces (AXI, PCIe, DDR, Ethernet, et
c.)Perform synthesis, place & route, and timing clos
ureBoard bring-up and debugging using tools like Vivado, Quar
tus
System Integration & Valida
tionCollaborate with hardware/software teams for end-to-end system integra
tionDevelop and execute test plans and validation strate
giesPerform lab debugging and failure anal
ysis
Required Skills & Qualifica
tionsTechnical S
killsStrong expertis
e in:Verilog / SystemVerilog /
VHDLFPGA design flow (Vivado, Quartus,
etc.)Experience
with:High-speed interfaces: PCIe, Ethernet, USB
, DDREmbedded firmware development (C
/C++)Good understandin
g of:Digital design fundamentals (FSMs, timing analysis, pipeli
ning)Clock domain crossing (CDC) techn
iquesHardware-software co-d
esign
Show more Show less
Experience: 7+ Years
Location: Bengaluru
Job Overvie
wWe are looking for a highly skilled RTL Design Engineer with strong expertise in FPGA development and embedded firmware. The candidate will be responsible for designing, implementing, and validating digital logic systems and working closely with system architects, hardware teams, and software engineers to deliver high-performance solutions
.
Key Responsibiliti
esRTL Design & Developme
ntDesign and develop RTL (Verilog/SystemVerilog/VHDL) for FPGA/ASIC-based syste
msImplement high-speed digital circuits, pipelines, and interfac
esPerform functional simulation, debugging, and verification of RTL desig
nsOptimize designs for timing, area, and power constrain
ts
FPGA Developm
entWork with FPGA platforms such as Xilinx, Intel (Altera), or Latt
iceImplement and debug IP cores, interfaces (AXI, PCIe, DDR, Ethernet, et
c.)Perform synthesis, place & route, and timing clos
ureBoard bring-up and debugging using tools like Vivado, Quar
tus
System Integration & Valida
tionCollaborate with hardware/software teams for end-to-end system integra
tionDevelop and execute test plans and validation strate
giesPerform lab debugging and failure anal
ysis
Required Skills & Qualifica
tionsTechnical S
killsStrong expertis
e in:Verilog / SystemVerilog /
VHDLFPGA design flow (Vivado, Quartus,
etc.)Experience
with:High-speed interfaces: PCIe, Ethernet, USB
, DDREmbedded firmware development (C
/C++)Good understandin
g of:Digital design fundamentals (FSMs, timing analysis, pipeli
ning)Clock domain crossing (CDC) techn
iquesHardware-software co-d
esign
Show more Show less