TN
RFIC Designer
Accepting applicationsTechnical-Link N. America · San Diego Metropolitan Area
Full-Time Mid_senior GaNRFSOIaiate
Posted
1d ago
Category
Test
Experience
Mid_senior
Country
United States
Job Description:
Key Responsibilities
● IP Development: Identify and document novel circuit architectures and design
techniques to contribute to Finwave’s growing Intellectual Property (IP) portfolio.
● Technology Integration: Utilize Finwave’s E-Mode GaN-on-Si processes to
achieve breakthroughs in power density and energy efficiency for 5G/6G and
SATCOM CPE.
● Advanced PA Design: Execute high-performance MMIC/Hybrid PA designs for
mobile RF front ends, optimized for Envelope Tracking (ET) and Average Power
Tracking (APT) operation.
● End-to-End Development: Contribute to the full design lifecycle, including
architecture support, tape-out, prototype characterization, and debugging for high-
volume production
● Collaboration: Work cross-functionally to document designs and ensure thermal
management strategies are integrated into high-power density applications.
Qualifications & Skills
● Education: Master’s or PhD in Electrical Engineering, RF/Microwave Engineering,
or Physics.
● Experience: 20+ years of experience in RF semiconductor design, with a proven
track record of shipping high-volume PA products for the global smartphone market.
● Strong teamwork, communication, organization, and documentation skills.
● Industry Standards: In-depth understanding of RFFE requirements for Tier-1
smartphone OEMs and current 3GPP standards.
● Innovation Mindset: Proven ability to develop creative solutions for complex RF
challenges, supporting the generation of internal design specs and patents.
Technical Expertise
● Device Physics: Mastery of GaN (preferred), III/V (GaAs) or SOI. compound
semiconductor device physics and advanced modeling.
● Thermal Design: Deep understanding of thermal management strategies for high-
power density applications in a flip-chip configuration.
● EDA Tools: Expert proficiency in Keysight ADS and Ansys HFSS for MMIC and
laminate co-simulation.
● Linearity Management: Expertise in managing the trade-offs between Noise
Figure, Gain, and Input Third-Order Intercept Point (IIP3) for high-performance
mobile RFFEs.
● Hands-on experience with RF/microwave test equipment such as network
analyzer, probe station, source/load pull system, noise figure measurements, and/or
signal sources/analyzers that deal with modulated signals.
● Familiarity with Noise Theory is a plus: Design Low Noise Amplifier (LNA),
including impedance matching and impact of parasitic losses on the Noise Figure
(NF).
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Key Responsibilities
● IP Development: Identify and document novel circuit architectures and design
techniques to contribute to Finwave’s growing Intellectual Property (IP) portfolio.
● Technology Integration: Utilize Finwave’s E-Mode GaN-on-Si processes to
achieve breakthroughs in power density and energy efficiency for 5G/6G and
SATCOM CPE.
● Advanced PA Design: Execute high-performance MMIC/Hybrid PA designs for
mobile RF front ends, optimized for Envelope Tracking (ET) and Average Power
Tracking (APT) operation.
● End-to-End Development: Contribute to the full design lifecycle, including
architecture support, tape-out, prototype characterization, and debugging for high-
volume production
● Collaboration: Work cross-functionally to document designs and ensure thermal
management strategies are integrated into high-power density applications.
Qualifications & Skills
● Education: Master’s or PhD in Electrical Engineering, RF/Microwave Engineering,
or Physics.
● Experience: 20+ years of experience in RF semiconductor design, with a proven
track record of shipping high-volume PA products for the global smartphone market.
● Strong teamwork, communication, organization, and documentation skills.
● Industry Standards: In-depth understanding of RFFE requirements for Tier-1
smartphone OEMs and current 3GPP standards.
● Innovation Mindset: Proven ability to develop creative solutions for complex RF
challenges, supporting the generation of internal design specs and patents.
Technical Expertise
● Device Physics: Mastery of GaN (preferred), III/V (GaAs) or SOI. compound
semiconductor device physics and advanced modeling.
● Thermal Design: Deep understanding of thermal management strategies for high-
power density applications in a flip-chip configuration.
● EDA Tools: Expert proficiency in Keysight ADS and Ansys HFSS for MMIC and
laminate co-simulation.
● Linearity Management: Expertise in managing the trade-offs between Noise
Figure, Gain, and Input Third-Order Intercept Point (IIP3) for high-performance
mobile RFFEs.
● Hands-on experience with RF/microwave test equipment such as network
analyzer, probe station, source/load pull system, noise figure measurements, and/or
signal sources/analyzers that deal with modulated signals.
● Familiarity with Noise Theory is a plus: Design Low Noise Amplifier (LNA),
including impedance matching and impact of parasitic losses on the Noise Figure
(NF).
Show more Show less