SG
Research Scientist - Formal Methods
Accepting applicationsStrativ Group · San Francisco Bay Area
Full-Time Mid_senior AI
Posted
6d ago
Category
Verification
Experience
Mid_senior
Country
United States
Research Scientist – Formal Methods
One of the world's most exciting startups; a well-funded AI Lab building the next generation of AI tools for chip design are hiring for Formal Methods Researchers.
Backed by an advisory board that includes some of the most influential figures in modern AI and computing, the team brings together researchers and engineers from leading orgs. like OpenAI, Anthropic, xAI, Google DeepMind, NVIDIA and Stanford. Their mission is to fundamentally change how custom silicon is designed, verified and brought to production.
They're looking for a Research Scientist specializing in Formal Methods to help build the verification foundations of an AI-native chip design platform. This is a rare opportunity to sit at the intersection of formal methods, systems research and real-world hardware engineering. You'll own a critical part of the stack that enables AI-generated hardware designs to be trusted, verified and ultimately manufactured. Rather than working on formal verification in isolation, you'll be applying rigorous research directly to production-grade silicon programmes.
You'll help design the specification languages and intermediate representations that underpin the platform, build proof-generation and verification infrastructure, integrate SMT solvers, model checkers and proof assistants, and establish the formal guarantees that allow the system to move from generated designs to verified hardware.
It's a genuine 0→1 role with significant ownership. You'll work closely with both AI researchers and engineers, defining the boundary between what can be formally proven and what must be empirically validated.
Key Skills
They're interested in people with deep expertise in formal methods and a track record of applying rigorous research to real systems. You will likely have:
A PhD in CS, Mathematics or Statistics
Deep knowledge of formal verification techniques, whether that's model checking, temporal logic, SMT solving, refinement-based methods, theorem proving, or related areas.
Hands-on experience with formal methods tooling such as TLA+, Lean, Coq, or equivalent frameworks.
A track record of applying formal methods to real-world hardware or systems that made it into production.
Strong engineering fundamentals and the ability to build robust, scalable tooling rather than purely theoretical frameworks.
Experience developing verification platforms, compiler infrastructure, domain-specific languages (DSLs), or intermediate representations (IRs).
Able to bridge research and engineering, turning novel ideas into practical systems that deliver results.
Bonus points for experience in silicon verification, EDA tooling, automated reasoning, HLS, compiler infrastructure, or publications at leading formal methods and programming languages conferences.
Few opportunities offer the chance to define the formal foundations of an entirely new approach to chip design. You'll be joining a small, elite team tackling one of the most important bottlenecks in computing. The work combines frontier AI research, formal reasoning and hardware design, with a direct path from theory to tape-out. If you're excited by proving things that matter, building systems from first principles, and helping shape the future of AI infrastructure, this is the kind of role that comes around very rarely.
Show more Show less
One of the world's most exciting startups; a well-funded AI Lab building the next generation of AI tools for chip design are hiring for Formal Methods Researchers.
Backed by an advisory board that includes some of the most influential figures in modern AI and computing, the team brings together researchers and engineers from leading orgs. like OpenAI, Anthropic, xAI, Google DeepMind, NVIDIA and Stanford. Their mission is to fundamentally change how custom silicon is designed, verified and brought to production.
They're looking for a Research Scientist specializing in Formal Methods to help build the verification foundations of an AI-native chip design platform. This is a rare opportunity to sit at the intersection of formal methods, systems research and real-world hardware engineering. You'll own a critical part of the stack that enables AI-generated hardware designs to be trusted, verified and ultimately manufactured. Rather than working on formal verification in isolation, you'll be applying rigorous research directly to production-grade silicon programmes.
You'll help design the specification languages and intermediate representations that underpin the platform, build proof-generation and verification infrastructure, integrate SMT solvers, model checkers and proof assistants, and establish the formal guarantees that allow the system to move from generated designs to verified hardware.
It's a genuine 0→1 role with significant ownership. You'll work closely with both AI researchers and engineers, defining the boundary between what can be formally proven and what must be empirically validated.
Key Skills
They're interested in people with deep expertise in formal methods and a track record of applying rigorous research to real systems. You will likely have:
A PhD in CS, Mathematics or Statistics
Deep knowledge of formal verification techniques, whether that's model checking, temporal logic, SMT solving, refinement-based methods, theorem proving, or related areas.
Hands-on experience with formal methods tooling such as TLA+, Lean, Coq, or equivalent frameworks.
A track record of applying formal methods to real-world hardware or systems that made it into production.
Strong engineering fundamentals and the ability to build robust, scalable tooling rather than purely theoretical frameworks.
Experience developing verification platforms, compiler infrastructure, domain-specific languages (DSLs), or intermediate representations (IRs).
Able to bridge research and engineering, turning novel ideas into practical systems that deliver results.
Bonus points for experience in silicon verification, EDA tooling, automated reasoning, HLS, compiler infrastructure, or publications at leading formal methods and programming languages conferences.
Few opportunities offer the chance to define the formal foundations of an entirely new approach to chip design. You'll be joining a small, elite team tackling one of the most important bottlenecks in computing. The work combines frontier AI research, formal reasoning and hardware design, with a direct path from theory to tape-out. If you're excited by proving things that matter, building systems from first principles, and helping shape the future of AI infrastructure, this is the kind of role that comes around very rarely.
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