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Quantum Topological Qubit Integration
Accepting applicationsGlobalFoundries · Essex Junction, VT
Full-Time Mid_senior aiateddrganrf
Posted
3d ago
Category
Test
Experience
Mid_senior
Country
United States
Quantum Topological Qubit Integration - Principal Engineer
About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
Introduction
The Topological Qubit Integration (Principal Engineer) role is a key technical contributor within the Quantum Technology Solutions organization focused on enabling scalable topological quantum computing platforms. This position supports the integration of advanced materials, device architectures, and semiconductor process technologies required for topological qubits, bridging emerging device concepts with manufacturable semiconductor solutions. This role works closely with integration leadership and cross-functional teams to translate quantum device requirements into practical, scalable process integration schemes aligned with performance, yield, and reliability targets.
Summary Of Role
As a Principal Engineer, this role contributes to the development and execution of semiconductor integration strategies for topological qubit systems. The engineer will focus on integrating III V materials, superconducting films, and topological device structures with semiconductor processes, including BEOL interconnect and heterogeneous integration. The position emphasizes hands-on technical execution, data-driven problem solving, and cross-functional collaboration to enable robust and scalable quantum hardware platforms.
Essential Responsibilities
Support integration of topological quantum devices, including III‑V heterostructures, superconducting materials, and hybrid material systems
Develop and execute process integration flows across device modules, BEOL interconnect, and heterogeneous integration schemes
Work with epitaxy and materials teams to ensure integration of III‑V layers, superconductors, and interfaces meets device performance requirements
Contribute to integration of device architectures supporting qubit operation as well as cryogenic read-out and control circuitry
Analyze device and process interactions, including defectivity, variability, contamination, and interface quality
Execute DOE (Design of Experiments) and analyze electrical and physical characterization data to guide process optimization
Support development of superconducting interconnect and low-loss BEOL wiring for operation at cryogenic temperatures
Collaborate with device engineering to ensure alignment between device physics requirements (e.g., coherence, noise, thermal performance) and integration
Participate in yield-learning activities, including root-cause analysis and corrective action implementation
Contribute to definition and tracking of technical milestones, including performance, variability, and reliability metrics
Work cross-functionally with process, materials, packaging, and design enablement teams to ensure successful end-to-end integration
Document integration flows, assumptions, and technical learnings to support scalable development and knowledge transfer
Other Responsibilities
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications
BS or MS in Electrical Engineering, Physics, Materials Science, or related field
5+ years of experience in semiconductor process or integration engineering
Experience with semiconductor device physics and materials interactions
Familiarity with advanced materials systems (e.g., III‑V semiconductors, superconductors, or related materials)
Experience analyzing electrical or physical characterization data
Strong analytical, problem-solving, and debugging skills
Effective communication skills
Preferred Qualifications
Experience with epitaxial growth or III‑V heterostructures (e.g., MBE, MOCVD)
Background in superconducting or hybrid semiconductor devices
Familiarity with topological quantum devices or related research areas
Experience with BEOL integration, interconnect technologies, or packaging
Experience with cryogenic device behavior and measurements.
Experience with DOE methodologies, yield analysis, or variability modeling
Experience working in advanced R&D or emerging technology environments
Expected Salary Range
$85,000.00 - $146,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
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About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
Introduction
The Topological Qubit Integration (Principal Engineer) role is a key technical contributor within the Quantum Technology Solutions organization focused on enabling scalable topological quantum computing platforms. This position supports the integration of advanced materials, device architectures, and semiconductor process technologies required for topological qubits, bridging emerging device concepts with manufacturable semiconductor solutions. This role works closely with integration leadership and cross-functional teams to translate quantum device requirements into practical, scalable process integration schemes aligned with performance, yield, and reliability targets.
Summary Of Role
As a Principal Engineer, this role contributes to the development and execution of semiconductor integration strategies for topological qubit systems. The engineer will focus on integrating III V materials, superconducting films, and topological device structures with semiconductor processes, including BEOL interconnect and heterogeneous integration. The position emphasizes hands-on technical execution, data-driven problem solving, and cross-functional collaboration to enable robust and scalable quantum hardware platforms.
Essential Responsibilities
Support integration of topological quantum devices, including III‑V heterostructures, superconducting materials, and hybrid material systems
Develop and execute process integration flows across device modules, BEOL interconnect, and heterogeneous integration schemes
Work with epitaxy and materials teams to ensure integration of III‑V layers, superconductors, and interfaces meets device performance requirements
Contribute to integration of device architectures supporting qubit operation as well as cryogenic read-out and control circuitry
Analyze device and process interactions, including defectivity, variability, contamination, and interface quality
Execute DOE (Design of Experiments) and analyze electrical and physical characterization data to guide process optimization
Support development of superconducting interconnect and low-loss BEOL wiring for operation at cryogenic temperatures
Collaborate with device engineering to ensure alignment between device physics requirements (e.g., coherence, noise, thermal performance) and integration
Participate in yield-learning activities, including root-cause analysis and corrective action implementation
Contribute to definition and tracking of technical milestones, including performance, variability, and reliability metrics
Work cross-functionally with process, materials, packaging, and design enablement teams to ensure successful end-to-end integration
Document integration flows, assumptions, and technical learnings to support scalable development and knowledge transfer
Other Responsibilities
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications
BS or MS in Electrical Engineering, Physics, Materials Science, or related field
5+ years of experience in semiconductor process or integration engineering
Experience with semiconductor device physics and materials interactions
Familiarity with advanced materials systems (e.g., III‑V semiconductors, superconductors, or related materials)
Experience analyzing electrical or physical characterization data
Strong analytical, problem-solving, and debugging skills
Effective communication skills
Preferred Qualifications
Experience with epitaxial growth or III‑V heterostructures (e.g., MBE, MOCVD)
Background in superconducting or hybrid semiconductor devices
Familiarity with topological quantum devices or related research areas
Experience with BEOL integration, interconnect technologies, or packaging
Experience with cryogenic device behavior and measurements.
Experience with DOE methodologies, yield analysis, or variability modeling
Experience working in advanced R&D or emerging technology environments
Expected Salary Range
$85,000.00 - $146,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
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