MT

Processor IO Architect

Accepting applications

Mulya Technologies · Greater Hyderabad Area

Full-Time Mid_senior PCIeRTL
Estimated market salary
₹13-24 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
3d ago
Category
Design
Experience
Mid_senior
Country
India
Processor IO Architect


Fortune 100 Organizatio
nLocation: Bangalor


e

Your Role And Responsibilit

ies
Design and Develop communication interface between the Host and external devices for future technologies like PCI Gen6/7, CXL
etc.Modify/Develop how the host handles I/O protocols and all transactions coming from and going to I/O devi
ces.Design improvements to internal buffers and FSMs on Host bridge to handle increased bandwidth and latency requirements for new I/O technolo
giesWork closely with other interconnect teams and System design teams to define I/O Phy and interconnects for scalable sys

tems
Required Technical And Professional Expe

rtise
Minimum 12-18 years of relevant experience with
MS/PhDHands-on RTL level experience of architecting and delivering industry standard IO inte
rfacesPrior experience with PCIe Gen 5
or CXLExperience in working with architecture/ FW/ SW
teamsExposure to System archit

ecture
Cont
actUdayMulya Techn
ologiesmuday_bhaskar@ya
hoo.comhttps://mulyate

ch.com/
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