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Principal IC Design Engineer
Accepting applicationsBroadcom · Broomfield, CO
Full-Time Mid_senior ASICSOCSystemVerilogVHDLVerilog
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
United States
Job Description:
The ASIC Product Division in Broadcom is a leading supplier of state-of-the-art SOCs to the world. Our products connect everything. We are seeking a motivated and technically strong engineer to join our SOC team to design and integrate IP on high volume and high performance SOCs.
This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry.
Responsibilities:
Participate in defining the overall SOC architecture.
Ensure quality design through detailed design analysis using leading edge tools
Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design
Collaborate with Internal and External teams to enable customer success
Refine solution by consulting with layout engineers to optimize area and performance
Define DRAM system timing budget goals aligned to product requirements
Generate collateral to support an IP release including design specifications
Skills and Experience:
Strong understanding and experience with high performance DRAM interface design
Experience with SOC architecture and how the memory interface fits into system
Excellent communication and cross-functional collaboration skills + usage of cloud based documentation
Ability to analyze complex trade-offs and make data-driven decisions
Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog
Strong understanding of physical implementation and timing closure with process variation
Understand Signal Integrity and related design impacts
Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support.
Education/Experience:
Bachelors in Engineering (EE, CE, or CS preferred) and 12+ years of related experience; OR Masters degree in Engineering and 10+ years of related experience.
Additional Job Description:
Compensation And Benefits
The annual base salary range for this position is $127,100 - $203,400.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R025879
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The ASIC Product Division in Broadcom is a leading supplier of state-of-the-art SOCs to the world. Our products connect everything. We are seeking a motivated and technically strong engineer to join our SOC team to design and integrate IP on high volume and high performance SOCs.
This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry.
Responsibilities:
Participate in defining the overall SOC architecture.
Ensure quality design through detailed design analysis using leading edge tools
Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design
Collaborate with Internal and External teams to enable customer success
Refine solution by consulting with layout engineers to optimize area and performance
Define DRAM system timing budget goals aligned to product requirements
Generate collateral to support an IP release including design specifications
Skills and Experience:
Strong understanding and experience with high performance DRAM interface design
Experience with SOC architecture and how the memory interface fits into system
Excellent communication and cross-functional collaboration skills + usage of cloud based documentation
Ability to analyze complex trade-offs and make data-driven decisions
Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog
Strong understanding of physical implementation and timing closure with process variation
Understand Signal Integrity and related design impacts
Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support.
Education/Experience:
Bachelors in Engineering (EE, CE, or CS preferred) and 12+ years of related experience; OR Masters degree in Engineering and 10+ years of related experience.
Additional Job Description:
Compensation And Benefits
The annual base salary range for this position is $127,100 - $203,400.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R025879
Show more Show less