Principal Engineer, PCIE ASIC Validation

Pls send 14+Yrs exp
Bachelors/Masters or equivalent experience in Engineering
Detailed Knowledge of PCIe/LPDDR Standards is must. PCIe G5/G6 or LPDDR5 would be preferred.
Experience with high‑speed serial protocols and SerDes PHY behavior
Good understanding on PCIe / NVME Architecture or LPDDR architecture
Minimum 14+ years of Processor based SoC, and hands-on PCIe validation experience with C/FW tests
Hands on LA, PCIe Switches, PA, Exerciser set up (Viavi*, Lecroy), Hardware set up, Debug set up is A Must
Good To Have - Knowledge of industry standard interfaces, such as ONFI, AXI is an advantage
Good To Have - Debug, bring up experience with SNPS PCIe Controller, PHY is an advantage
Proven experience in scripting languages such as Python / Perl / TCL
Good written and oral communication
Excellent Great Teammate, Positive attitude, well-mannered mature behaviour is must

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