RE
Principal Engineer, AI Compiler
Accepting applicationsRenesas Electronics · San Jose, CA
Full-Time Mid_senior AIC++MentorPythonSoC
Posted
20 Jul
Category
Design
Experience
Mid_senior
Country
United States
Job Description
As an AI Compiler Engineer on the Renesas HPC team, you will be responsible for driving compiler and code generation technologies that unlock the full compute potential of Renesas next-generation automotive System-on-Chip platforms, including advanced 3 nm silicon for software-defined vehicles (SDVs). Your work will directly impact how AI workloads — from perception and sensor fusion to in-vehicle assistants and advanced driver assistance — are translated into highly optimized, safe, and power-efficient execution on Renesas hardware.
This role bridges software compiler development, AI model lowering/optimization, and hardware-software co-design, enabling Renesas SoCs to deliver industry-competitive performance, efficiency, and functional safety required by multi-domain automotive applications..
Qualifications
What You’ll Do
Lead AI compiler architecture across model ingestion, graph optimization, lowering, code generation, and runtime integration
Design and implement graph‑level optimizations (operator fusion, quantization‑aware rewrites, memory‑aware scheduling, partitioning)
Drive performance optimization for target NPUs, including tiling, tensor layout, and multi‑core execution strategies
Partner with SoC and AI accelerator architects to influence hardware features through compiler insights
Own performance KPIs for real automotive AI workloads using simulators, profilers, and silicon‑correlated models
Ensure compiler outputs meet automotive requirements (real‑time behavior, determinism, quality expectations)
Mentor senior engineers and set technical direction without people‑management responsibilities
What We’re Looking For
MS/PhD (or equivalent experience) in Computer Science, EE, or related field
Deep experience building AI compilers, accelerator backends, or graph optimization frameworks
Strong expertise in graph optimization and performance optimization for NPUs or custom accelerators
Experience with MLIR, LLVM, TVM‑like systems, or proprietary compiler IRs
Excellent C/C++ and Python skills
Solid understanding of AI inference workloads (CNNs, transformers, perception or generative models)
Strong communication skills are required, e.g. agile development experience in Scrum team (Product Owner or Scrum Master) ← for Principal Engineer
Strong communication skills are required, e.g. agile development experience in Scrum team (Scrum Master or member) ← for Sr Staff Engineer
Additional Information
Nice to Have
Experience with automotive or safety‑critical systems
Background in heterogeneous SoCs (CPU/GPU/DSP/NPU)
Performance modeling or hardware–software co‑design experience
Impact & Differentiators
Renesas’ Gen5 R-Car automotive SoC lineup, including flagship 3 nm devices like the R-Car X5H, is among the first highly integrated multi-domain automotive SoCs built on advanced 3 nm process technology, designed to run ADAS, IVI, gateway, and next-gen SDV workloads on a centralized platform. These platforms deliver high AI performance (e.g., multi-hundreds of TOPS), scalable chiplet-based acceleration, and power efficiency tailored for electrified and autonomous vehicles while meeting stringent functional safety standards. An AI Compiler Engineer enables this hardware vision by ensuring that state-of-the-art AI models and computational kernels are efficiently mapped to the silicon fabric — directly enhancing performance, reducing latency and energy, and accelerating software adoption in automotive ecosystems where compute efficiency and safety are paramount.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
Show more Show less
As an AI Compiler Engineer on the Renesas HPC team, you will be responsible for driving compiler and code generation technologies that unlock the full compute potential of Renesas next-generation automotive System-on-Chip platforms, including advanced 3 nm silicon for software-defined vehicles (SDVs). Your work will directly impact how AI workloads — from perception and sensor fusion to in-vehicle assistants and advanced driver assistance — are translated into highly optimized, safe, and power-efficient execution on Renesas hardware.
This role bridges software compiler development, AI model lowering/optimization, and hardware-software co-design, enabling Renesas SoCs to deliver industry-competitive performance, efficiency, and functional safety required by multi-domain automotive applications..
Qualifications
What You’ll Do
Lead AI compiler architecture across model ingestion, graph optimization, lowering, code generation, and runtime integration
Design and implement graph‑level optimizations (operator fusion, quantization‑aware rewrites, memory‑aware scheduling, partitioning)
Drive performance optimization for target NPUs, including tiling, tensor layout, and multi‑core execution strategies
Partner with SoC and AI accelerator architects to influence hardware features through compiler insights
Own performance KPIs for real automotive AI workloads using simulators, profilers, and silicon‑correlated models
Ensure compiler outputs meet automotive requirements (real‑time behavior, determinism, quality expectations)
Mentor senior engineers and set technical direction without people‑management responsibilities
What We’re Looking For
MS/PhD (or equivalent experience) in Computer Science, EE, or related field
Deep experience building AI compilers, accelerator backends, or graph optimization frameworks
Strong expertise in graph optimization and performance optimization for NPUs or custom accelerators
Experience with MLIR, LLVM, TVM‑like systems, or proprietary compiler IRs
Excellent C/C++ and Python skills
Solid understanding of AI inference workloads (CNNs, transformers, perception or generative models)
Strong communication skills are required, e.g. agile development experience in Scrum team (Product Owner or Scrum Master) ← for Principal Engineer
Strong communication skills are required, e.g. agile development experience in Scrum team (Scrum Master or member) ← for Sr Staff Engineer
Additional Information
Nice to Have
Experience with automotive or safety‑critical systems
Background in heterogeneous SoCs (CPU/GPU/DSP/NPU)
Performance modeling or hardware–software co‑design experience
Impact & Differentiators
Renesas’ Gen5 R-Car automotive SoC lineup, including flagship 3 nm devices like the R-Car X5H, is among the first highly integrated multi-domain automotive SoCs built on advanced 3 nm process technology, designed to run ADAS, IVI, gateway, and next-gen SDV workloads on a centralized platform. These platforms deliver high AI performance (e.g., multi-hundreds of TOPS), scalable chiplet-based acceleration, and power efficiency tailored for electrified and autonomous vehicles while meeting stringent functional safety standards. An AI Compiler Engineer enables this hardware vision by ensuring that state-of-the-art AI models and computational kernels are efficiently mapped to the silicon fabric — directly enhancing performance, reducing latency and energy, and accelerating software adoption in automotive ecosystems where compute efficiency and safety are paramount.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
Show more Show less
Similar Jobs
GA
Embedded Software Engineer - Aerospace
GE Aerospace · Grand Rapids, MI
WP
Substation Engineer II - Physical
Westwood Professional Services · San Antonio, TX
WP
Substation Engineer II - Physical
Westwood Professional Services · Lansdale, PA
BS
Entry Level Hardware Engineer - Electrical/Mechanical/RF (Hybrid)
BAE Systems, Inc. · Nashua, NH