PS
Principal Emulation Engineer
Accepting applicationsPradhi Semiconductor Private Limited · Hyderabad, Telangana, India
Full-Time Mid_senior ARMC++CadencePerlPython
Estimated market salary
₹49-89 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
India
Our SoC Engineering division is seeking a skilled Emulation Engineer to join 5G MPU product development team. As we continue to grow, we need talented engineers responsible for the development of products across Enterprise/Telecom markets.
Responsibilities
In this role you will:
Lead the development of complex Sub-System emulation models, including design integration, environment setup, compilation, and debug across industry‑leading platforms (e.g., Veloce, ZeBu, Palladium).
Drive emulation bring‑up activities, including clock/reset sequencing, firmware boot, and system validation using pre‑silicon hardware models.
Create and execute emulation test plans to support verification, performance analysis, software development, and system validation needs across multiple teams.
Collaborate closely with RTL design, verification, and firmware teams to define requirements, develop accurate hardware models, and ensure seamless integration into the emulation environment.
Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions.
Optimize emulation performance, including model partitioning, timing, and runtime efficiency.
Experience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs.
Professional attitude with the ability to prioritize a dynamic list of multiple tasks and to work with minimal guidance and supervision.
Automate flows and improve productivity through scripting (Python, Perl, Tcl, shell) and tooling enhancements.
Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate tool capabilities, resolve technical issues, and drive feature improvements.
Qualifications
BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of IP/SOC verification and firmware and software verification experience (or MS/PhD with 8+ years experience).
Experience with System Verilog, UVM.
Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
Experience with scripting language such as Python or Perl and EDA Verification tools.
Experience with Object-Oriented Design and implementation.
Good understanding of Linux O.S.
Good programming skills desired, especially C++ and ARM/RISC-V assembly.
Understanding of networking protocols, a plus.
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Responsibilities
In this role you will:
Lead the development of complex Sub-System emulation models, including design integration, environment setup, compilation, and debug across industry‑leading platforms (e.g., Veloce, ZeBu, Palladium).
Drive emulation bring‑up activities, including clock/reset sequencing, firmware boot, and system validation using pre‑silicon hardware models.
Create and execute emulation test plans to support verification, performance analysis, software development, and system validation needs across multiple teams.
Collaborate closely with RTL design, verification, and firmware teams to define requirements, develop accurate hardware models, and ensure seamless integration into the emulation environment.
Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions.
Optimize emulation performance, including model partitioning, timing, and runtime efficiency.
Experience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs.
Professional attitude with the ability to prioritize a dynamic list of multiple tasks and to work with minimal guidance and supervision.
Automate flows and improve productivity through scripting (Python, Perl, Tcl, shell) and tooling enhancements.
Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate tool capabilities, resolve technical issues, and drive feature improvements.
Qualifications
BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of IP/SOC verification and firmware and software verification experience (or MS/PhD with 8+ years experience).
Experience with System Verilog, UVM.
Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
Experience with scripting language such as Python or Perl and EDA Verification tools.
Experience with Object-Oriented Design and implementation.
Good understanding of Linux O.S.
Good programming skills desired, especially C++ and ARM/RISC-V assembly.
Understanding of networking protocols, a plus.
Show more Show less