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Principal DV Engineer
Accepting applicationsMediaTek · San Jose, CA
Full-Time Principal ARMRISC-VSystemVerilogUVM
Posted
4 Sept
Category
Verification
Experience
Principal
Country
United States
Job Description
Lead the DV effort of a high-end CPU project.
Architect and implement testbenches and their components using UVM-based methods.
Lead the effort in building in-house BFMs, unit-level testbenches and stimulus.
Work with the design team to create testplans. Implement checkers/assertions/coverages. Drive directed testcases and controlled random testcases based on the testplans.
Work on the core-level verification using in-house testbenches. Triage bug reports, profile failure cases, check functional coverage and drive the effort of directed testcase generation.
Main Requirements and Qualifications
Masters/Bachelor or above degree in electronic/electrical engineering, computer science, mathematics or physics.
10+ years of verification experiences
Familiar with industry instruction set architects such as ARM, RISC-V and etc.
Hands-on experience in the field of cache coherent fabric verification
Solid experiences with SystemVerilog, UVM and etc.
Experiences with major processor blocks.
Scripting capability is highly desired.
Good written and verbal communication skills
Good cross site and cross function execution skills
Salary range: $179,100-$301,000 Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
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Lead the DV effort of a high-end CPU project.
Architect and implement testbenches and their components using UVM-based methods.
Lead the effort in building in-house BFMs, unit-level testbenches and stimulus.
Work with the design team to create testplans. Implement checkers/assertions/coverages. Drive directed testcases and controlled random testcases based on the testplans.
Work on the core-level verification using in-house testbenches. Triage bug reports, profile failure cases, check functional coverage and drive the effort of directed testcase generation.
Main Requirements and Qualifications
Masters/Bachelor or above degree in electronic/electrical engineering, computer science, mathematics or physics.
10+ years of verification experiences
Familiar with industry instruction set architects such as ARM, RISC-V and etc.
Hands-on experience in the field of cache coherent fabric verification
Solid experiences with SystemVerilog, UVM and etc.
Experiences with major processor blocks.
Scripting capability is highly desired.
Good written and verbal communication skills
Good cross site and cross function execution skills
Salary range: $179,100-$301,000 Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
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