BV
Principal ASIC Design Verification Engineer
Accepting applicationsBright Vision Technologies · Santa Clara, CA
Full-Time Mid_senior ASICC++PCIePerlPython
Posted
1d ago
Category
Verification
Experience
Mid_senior
Country
United States
Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. We leverage cutting-edge technologies to create scalable, secure, and user-friendly applications.
As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer – UAL & PCIe Subsystems to join our dynamic team and contribute to our mission of transforming business processes through technology.
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.
Job Title: Principal Design Verification Engineer – UAL & PCIe Subsystems
Location: Santa Clara, CA (Onsite)
Salary: $138,000 – $317,800
Bonus + RSUs
Job Summary
We are looking for an experienced Principal Design Verification Engineer to support verification of high-performance SoC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and verification methodologies, along with experience in UAL or PCIe protocols.
Responsibilities
Develop and maintain verification environments using SystemVerilog and UVM
Create verification test plans and drive coverage closure
Develop and execute test cases for SoC verification
Debug design and verification issues
Develop automation tools using Python or Perl
Perform unit and regression testing
Collaborate with design and engineering teams throughout the development cycle
Required Skills
BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering
10–12 years of Design Verification experience
Strong experience with SystemVerilog and UVM
Experience creating verification plans and constrained-random test environments
Python or Perl scripting experience
Experience with EDA verification tools
Strong Linux and Object-Oriented Programming knowledge
Good programming skills in C++
Working knowledge of UAL or PCIe protocols
Relocation Assistance Available
Visa Sponsorship Available
Would you like to know more about this opportunity? For immediate consideration, please send your resume to ayushi@bvteck.com or contact us at (908) 650-6382
Bright Vision Technologies, we are committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.
Position offered by “No Fee agency.”
Equal Employment Opportunity (EEO) Statement
Bright Vision Technologies (BV Teck) is committed to equal employment opportunity (EEO) for all employees and applicants without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other protected status as defined by applicable federal, state, or local laws. This commitment extends to all aspects of employment, including recruitment, hiring, training, compensation, promotion, transfer, leaves of absence, termination, layoffs, and recall.
BV Teck expressly prohibits any form of workplace harassment or discrimination. Any improper interference with employees' ability to perform their job duties may result in disciplinary action up to and including termination of employment.
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As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer – UAL & PCIe Subsystems to join our dynamic team and contribute to our mission of transforming business processes through technology.
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.
Job Title: Principal Design Verification Engineer – UAL & PCIe Subsystems
Location: Santa Clara, CA (Onsite)
Salary: $138,000 – $317,800
Bonus + RSUs
Job Summary
We are looking for an experienced Principal Design Verification Engineer to support verification of high-performance SoC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and verification methodologies, along with experience in UAL or PCIe protocols.
Responsibilities
Develop and maintain verification environments using SystemVerilog and UVM
Create verification test plans and drive coverage closure
Develop and execute test cases for SoC verification
Debug design and verification issues
Develop automation tools using Python or Perl
Perform unit and regression testing
Collaborate with design and engineering teams throughout the development cycle
Required Skills
BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering
10–12 years of Design Verification experience
Strong experience with SystemVerilog and UVM
Experience creating verification plans and constrained-random test environments
Python or Perl scripting experience
Experience with EDA verification tools
Strong Linux and Object-Oriented Programming knowledge
Good programming skills in C++
Working knowledge of UAL or PCIe protocols
Relocation Assistance Available
Visa Sponsorship Available
Would you like to know more about this opportunity? For immediate consideration, please send your resume to ayushi@bvteck.com or contact us at (908) 650-6382
Bright Vision Technologies, we are committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.
Position offered by “No Fee agency.”
Equal Employment Opportunity (EEO) Statement
Bright Vision Technologies (BV Teck) is committed to equal employment opportunity (EEO) for all employees and applicants without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other protected status as defined by applicable federal, state, or local laws. This commitment extends to all aspects of employment, including recruitment, hiring, training, compensation, promotion, transfer, leaves of absence, termination, layoffs, and recall.
BV Teck expressly prohibits any form of workplace harassment or discrimination. Any improper interference with employees' ability to perform their job duties may result in disciplinary action up to and including termination of employment.
Powered by JazzHR
yfmwSqlJ2z
Show more Show less