IT
Power-Performance / System Optimization Engineer
Accepting applicationsIravan Technologies · Pune City, Maharashtra, India
Full-Time Entry AIC++PythonSoC
Estimated market salary
₹5-8 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Design
Experience
Entry
Country
India
Designation-Power-Performance / System Optimization Engineer
Experience Level: 5–10+ Years
Role Type: Individual Contributor
Location: Bangalore / Hyderabad (Hybrid)
Position Summary
Develop system-level models and analysis methodologies to optimize performance, power, and efficiency of the company’s chiplet-based AI infrastructure.
Key Responsibilities
• Power-Performance Modelling: Develop appropriate abstraction models for power infrastructure; model voltage/frequency and power-management scenarios; analyze power-performance trade-offs; evaluate power impact of workload and system configurations.
• System Performance & Architecture Exploration: Perform performance-per-watt analysis; analyze the impact of connectivity, memory, and workload configurations on system efficiency; identify architectural bottlenecks affecting power and performance; support architecture optimization studies.
Required Technical Skills
• 5–10+ years of SoC/system architecture or power-performance engineering experience.
• Power/performance modelling.
• C++ / Python.
• SystemC/TLM.
• SoC architecture.
• AI/HPC systems.
• Power-management concepts.
Preferred Skills
• DVFS.
• Thermal modelling.
• In-package power delivery.
• IVR (integrated voltage regulation) technology.
• HBM power modelling.
• AI accelerator power analysis.
Education
• B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, or related discipline.
Project Experience
• Hands-on power-performance modelling or optimization work on a SoC/system-level platform.
Soft Skills
• Ability to balance competing power, performance, and efficiency objectives and communicate trade-offs clearly.
• Strong collaboration with connectivity, memory, and performance architecture teams.
Good to Have
• Direct DVFS or thermal-modelling experience on a production SoC.
• Exposure to in-package power delivery or integrated voltage regulation technology.
Expected Deliverables
• Power/performance abstraction models and voltage/frequency scenario analysis.
• Performance-per-watt analysis reports.
• Architecture optimization recommendations addressing power and performance bottlenecks.
Interested candidates may share resumes at [email protected](Immediate to 30-day notice period candidates preferred).
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Experience Level: 5–10+ Years
Role Type: Individual Contributor
Location: Bangalore / Hyderabad (Hybrid)
Position Summary
Develop system-level models and analysis methodologies to optimize performance, power, and efficiency of the company’s chiplet-based AI infrastructure.
Key Responsibilities
• Power-Performance Modelling: Develop appropriate abstraction models for power infrastructure; model voltage/frequency and power-management scenarios; analyze power-performance trade-offs; evaluate power impact of workload and system configurations.
• System Performance & Architecture Exploration: Perform performance-per-watt analysis; analyze the impact of connectivity, memory, and workload configurations on system efficiency; identify architectural bottlenecks affecting power and performance; support architecture optimization studies.
Required Technical Skills
• 5–10+ years of SoC/system architecture or power-performance engineering experience.
• Power/performance modelling.
• C++ / Python.
• SystemC/TLM.
• SoC architecture.
• AI/HPC systems.
• Power-management concepts.
Preferred Skills
• DVFS.
• Thermal modelling.
• In-package power delivery.
• IVR (integrated voltage regulation) technology.
• HBM power modelling.
• AI accelerator power analysis.
Education
• B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, or related discipline.
Project Experience
• Hands-on power-performance modelling or optimization work on a SoC/system-level platform.
Soft Skills
• Ability to balance competing power, performance, and efficiency objectives and communicate trade-offs clearly.
• Strong collaboration with connectivity, memory, and performance architecture teams.
Good to Have
• Direct DVFS or thermal-modelling experience on a production SoC.
• Exposure to in-package power delivery or integrated voltage regulation technology.
Expected Deliverables
• Power/performance abstraction models and voltage/frequency scenario analysis.
• Performance-per-watt analysis reports.
• Architecture optimization recommendations addressing power and performance bottlenecks.
Interested candidates may share resumes at [email protected](Immediate to 30-day notice period candidates preferred).
Show more Show less