Post Silicon Validation Engineer

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Position: Post silicon Validation engineer

Exp: 10+ years

Location: Sanjose, CA

Key Skills: Post Silicon Validation,Oscilloscope, Multimeters, Analyzers, PCIe, Ethernet, Python, Perl

Conduct initial power-on, reset sequencing, clock bring-up, and strap configuration for complex networking ASICs or SoCs
EValidate Ethernet (e.g., 100G/400G/800G) MAC/PHY and PCIe (Gen 4/5/6) interfaces for physical layer integrity.
Develop, execute, and automate validation test plans and SDK-driven test environments using Python & C/C++.
Root-cause complex silicon, link training, and firmware bugs utilizing lab equipment like oscilloscopes, logic analyzers, traffic generators, and protocol analyzers
System Bring up with different configurations for Post Silicon Validation

Execution of test suites, analyse and debug issues, creating reports

5 to 7 years of experience

Deep understanding of high-speed SerDes, bus protocols, and interconnect verification
Hands-on with Lab tools like Oscilloscope, Multimeters, Analyzers, and hands-on experience in doing simple Rework.
Experience in High Speed I/Os like PCIe (preferably Gen4 and above) and and Ethernet and high-speed interconnects
Preferred experience with scripting using TCL, Python
Solid experience in handling the growth charter for growing teams and embrace changes with ease and grace
Interaction with cross functional teams (FW/BIOS/LAYOUT/Platform/IP Design/Silicon Design)
Highly experienced in debugging interfaces using test equipment like Logic analyzer, Oscilloscope and Protocol analyzers.
Highly experienced in SOC / Platform Bring-up and debugging bring-up failures.
Experience in writing scripts in Python, Ruby or PERL.
B.E/B.Tech in Electronics & Communication Engineering
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