SI
Platform Architect Modelling Engineer
Accepting applicationsSynopsys Inc · Noida, Uttar Pradesh, India
Full-Time Mid_senior AIC++DDRSoCSynopsys
Estimated market salary
₹10-19 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
12 Jun
Category
Design
Experience
Mid_senior
Country
India
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent the last several years living in C++—not just writing code that runs, but building simulation models where every line matters for both performance and clarity. When you see a block diagram of a new SoC, your brain immediately starts mapping out how you’d model each piece, from processors to interconnects to memory controllers. You are the one who asks the hard questions about where a model will break or where an interface contract is ambiguous, and you don’t let those questions slide. You are comfortable working in SystemC and TLM, or you’re eager to master them because you see how they unlock real architectural exploration. You thrive in conversation with both architects and other engineers, translating requirements into code and back again, and you keep your documentation as crisp as your implementations. You’re at your best when you’re solving thorny debugging puzzles in Linux, optimizing for both speed and correctness, and you know when to push for refactoring and when to ship. You want your work to show up in real customer outcomes, not just test benches.
What You'll Be Doing
Develop and maintain high-quality simulation models for processors, interconnects, peripherals, and complete SoC platforms using C++ and SystemC
Write reliable, performant code with robust unit tests, using modern C++ (STL, design patterns) and adhering to project specifications
Participate in architecture discussions, contributing ideas for model structure, scalability, and performance
Optimize simulation models to handle complex SoC designs and meet demanding KPIs
Integrate third-party models and IP into the Platform Architect environment, ensuring seamless compatibility and performance
Work closely with engineering, product, and tools teams to deliver solutions that align with real customer use cases
Document technical solutions, author interface contracts, and communicate design decisions to architecture groups and leadership
Apply Agile development principles to deliver value incrementally and adapt to evolving requirements
The Impact You Will Have
Accelerate time-to-market for customers by delivering fast, accurate architectural models they can trust for design decisions
Enable teams to explore power, performance, and area tradeoffs early, reducing costly silicon re-spins
Improve the quality and maintainability of the Platform Architect tool, making it easier for others to build on your work
Increase customer satisfaction by resolving modeling bottlenecks and supporting advanced architecture exploration
Raise the technical bar for the team through clear documentation, rigorous code reviews, and thoughtful technical discussions
Expand the reach of Platform Architect by integrating new IP and supporting emerging bus protocols and memory architectures
What You'll Need
Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or equivalent practical experience
4+ years of hands-on C++ programming experience, including STL and design patterns
Solid understanding of computer architecture concepts and hardware/software interfacing
Strong debugging skills in a Linux environment
Experience writing and reviewing technical documentation and interface contracts
Knowledge of SystemC and TLM, or a strong willingness to learn them on the job, is a plus
Familiarity with memory architectures (DDR/LPDDR/GDDR/HBM) and bus protocols (AHB/AXI/ACE/ACE-Lite) is an advantage
Experience with EDA tools is beneficial
Who You Are
You break down complex architecture diagrams and turn them into maintainable, high-performance code
You spot edge cases and design pitfalls early, and you are not afraid to challenge assumptions in design reviews
You explain technical tradeoffs clearly, whether you’re talking to another engineer or presenting to product leaders
You document your work so your solutions are easy to pick up, extend, and debug by others
You push for engineering excellence but are pragmatic about shipping value incrementally
You adapt to shifting requirements and find a way forward, even when details are incomplete
The Team You'll Be Part Of
Your recruiter will share more about the team structure and mission during the interview process.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#TPG
Show more Show less
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent the last several years living in C++—not just writing code that runs, but building simulation models where every line matters for both performance and clarity. When you see a block diagram of a new SoC, your brain immediately starts mapping out how you’d model each piece, from processors to interconnects to memory controllers. You are the one who asks the hard questions about where a model will break or where an interface contract is ambiguous, and you don’t let those questions slide. You are comfortable working in SystemC and TLM, or you’re eager to master them because you see how they unlock real architectural exploration. You thrive in conversation with both architects and other engineers, translating requirements into code and back again, and you keep your documentation as crisp as your implementations. You’re at your best when you’re solving thorny debugging puzzles in Linux, optimizing for both speed and correctness, and you know when to push for refactoring and when to ship. You want your work to show up in real customer outcomes, not just test benches.
What You'll Be Doing
Develop and maintain high-quality simulation models for processors, interconnects, peripherals, and complete SoC platforms using C++ and SystemC
Write reliable, performant code with robust unit tests, using modern C++ (STL, design patterns) and adhering to project specifications
Participate in architecture discussions, contributing ideas for model structure, scalability, and performance
Optimize simulation models to handle complex SoC designs and meet demanding KPIs
Integrate third-party models and IP into the Platform Architect environment, ensuring seamless compatibility and performance
Work closely with engineering, product, and tools teams to deliver solutions that align with real customer use cases
Document technical solutions, author interface contracts, and communicate design decisions to architecture groups and leadership
Apply Agile development principles to deliver value incrementally and adapt to evolving requirements
The Impact You Will Have
Accelerate time-to-market for customers by delivering fast, accurate architectural models they can trust for design decisions
Enable teams to explore power, performance, and area tradeoffs early, reducing costly silicon re-spins
Improve the quality and maintainability of the Platform Architect tool, making it easier for others to build on your work
Increase customer satisfaction by resolving modeling bottlenecks and supporting advanced architecture exploration
Raise the technical bar for the team through clear documentation, rigorous code reviews, and thoughtful technical discussions
Expand the reach of Platform Architect by integrating new IP and supporting emerging bus protocols and memory architectures
What You'll Need
Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or equivalent practical experience
4+ years of hands-on C++ programming experience, including STL and design patterns
Solid understanding of computer architecture concepts and hardware/software interfacing
Strong debugging skills in a Linux environment
Experience writing and reviewing technical documentation and interface contracts
Knowledge of SystemC and TLM, or a strong willingness to learn them on the job, is a plus
Familiarity with memory architectures (DDR/LPDDR/GDDR/HBM) and bus protocols (AHB/AXI/ACE/ACE-Lite) is an advantage
Experience with EDA tools is beneficial
Who You Are
You break down complex architecture diagrams and turn them into maintainable, high-performance code
You spot edge cases and design pitfalls early, and you are not afraid to challenge assumptions in design reviews
You explain technical tradeoffs clearly, whether you’re talking to another engineer or presenting to product leaders
You document your work so your solutions are easy to pick up, extend, and debug by others
You push for engineering excellence but are pragmatic about shipping value incrementally
You adapt to shifting requirements and find a way forward, even when details are incomplete
The Team You'll Be Part Of
Your recruiter will share more about the team structure and mission during the interview process.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#TPG
Show more Show less
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