Physical Design Senior Staff Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, automotive, and networking applications.

What You Can Expect

Responsible for the physical implementation of complex integrated circuits (ICs). Customize, enhance, and support Marvell’s global timing and noise sign-off flow for Compute and Custom Solutions designs, incorporating industry standard EDA tools. Own timing closure for a portion of a chip or for the full chip. Develop and implement timing and logic ECO’s using automated and manual approaches. Interact with the RTL design team to understand timing requirements and to drive design modifications to resolve congestion and timing issues. Interact with the global timing team and the PnR/integration teams in debugging/resolving any block level timing issues seen at partition or full chip level. Test and maintain chip end-to-end flows, with specific focus on noise, timing and power. Interact with tool vendors to drive tool fixes and improvements in support of on-going and planned CAD activities. Performing tool evaluations of new vendor tools and functions. Wage: $138,000.00 - $168,000.00 per year.

What We're Looking For

Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and two (2) years of experience in the job offered or related occupation.

Experience must include two (2) years with each of the following:
•    Performing Static Timing Analysis (STA) or Place and Route (PnR).
•    Evaluating timing results using industry standard tools (Synopsys or Cadence).
•    Evaluating timing reports and identifying causes of typical timing issues.
•    Tcl-based tool interface commands Cadence and/or Synopsys tools.
•    SDC commands to manage I/O timing, clock definitions, false paths.
•    Key static timing analysis concepts such as crosstalk analysis.
•    Timing of I/O interfaces, statistical modeling, scan timing, global clock balancing.
•    Scripting and coding (PERL, TCL, PYTHON, UNIX shell commands).

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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