Physical Design Engineer

Position: physical design engineer
Location: Mountainview, CA – Onsite
Type: long term contract(W2)
Position summary:
We are looking for a Physical Design Engineer with hands-on experience in TSMC 3nm/2nm at SOC for cutting-edge GPU / High-Performance designs.
Key Responsibilities:
1. Own Netlist-to-GDSII for high-speed, low-power SOC
2. Floorplanning, Placement, CTS, Routing, Timing closure
3. Drive PPA optimization - Power, Performance, Area for 2nm/3nm
4. Handle advanced nodes issues: IR Drop, EM, Crosstalk etc
5. Hands on experience on tools - Synopsys Fusion Compiler, Innovus, Primetime, Calibre
Very Imp Skill : Innovous, 2nm, 3nm, 4nm, 5nm

Experience -
5 -10 years in Physical Design

Thanks & Regards,
Radha Venkatraman
Recruitment Manager
Direct No: +1 8666822966 ext136
[email protected] | www.vsiontek.com
Vsion Technologies, Inc.
507 Denali Pass , Suite 602 , Cedar Park , TX 78613
Certified Minority Business Enterprise (“MBE”) / Woman-Owned Business Enterprise (“WBE”)

*** Vsion Technologies, Inc is Celebrating 15 years in IT Industry ***

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