BS
NoC Hardware Design Engineer
Accepting applicationsBaya Systems · San Francisco Bay Area
Full-Time Mid_senior C++PythonSoCVerilogai
Posted
6d ago
Category
Design
Experience
Mid_senior
Country
United States
NoC Architect
Baya Systems , Santa Clara, CA
Job Title: NoC Architect
About the role: We are seeking a NoC Architect with prior research experience in Networks-on-Chip (NoCs) and proficiency in architecture, micro-architecture or software. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions.
Responsibilities :
Develop cutting edge NoC architecture solutions for complex chiplets and SoC’s
Develop Baya’s system software or microarchitecture for a set of highly configurable IPs
Develop core software optimization algorithms and platforms
Build performance models for NoC’s and other IP’s
Qualifications:
PhD in Computer Engineering, Electrical Engineering or Computer Science with focus on Networks-on-Chip (NoCs)
Strong understanding of computer architecture, memory hierarchies and networking concepts
Strong object-oriented programming skills with Python/C++/System Verilog
Experience with AXI/ACE/CHI or similar protocols
Expert level knowledge of Data Structures and Algorithms
Expert level knowledge of building concurrent system models
Understanding of software systems design and modelling
Experience with modern code development practices: Git, CI, UI
Excellent problem-solving skills and attention to detail
Strong communication and collaboration skills
rich.goldstein@bayasystems.com
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Baya Systems , Santa Clara, CA
Job Title: NoC Architect
About the role: We are seeking a NoC Architect with prior research experience in Networks-on-Chip (NoCs) and proficiency in architecture, micro-architecture or software. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions.
Responsibilities :
Develop cutting edge NoC architecture solutions for complex chiplets and SoC’s
Develop Baya’s system software or microarchitecture for a set of highly configurable IPs
Develop core software optimization algorithms and platforms
Build performance models for NoC’s and other IP’s
Qualifications:
PhD in Computer Engineering, Electrical Engineering or Computer Science with focus on Networks-on-Chip (NoCs)
Strong understanding of computer architecture, memory hierarchies and networking concepts
Strong object-oriented programming skills with Python/C++/System Verilog
Experience with AXI/ACE/CHI or similar protocols
Expert level knowledge of Data Structures and Algorithms
Expert level knowledge of building concurrent system models
Understanding of software systems design and modelling
Experience with modern code development practices: Git, CI, UI
Excellent problem-solving skills and attention to detail
Strong communication and collaboration skills
rich.goldstein@bayasystems.com
Show more Show less