Memory Circuit Design Engineer

Company Overview

A global leader in accelerated computing and AI, driving innovation across data centers, automotive, gaming, graphics, and high-performance computing. The company develops advanced GPUs, CPUs, networking, and AI platforms that power next-generation computing systems. Its automotive technology focuses on AI-powered autonomous driving, advanced visualization, and high-performance computing platforms, enabling safer and smarter mobility solutions.

Position Overview

This position focuses on SRAM circuit design and compiler development for advanced semiconductor technologies. The role involves transistor-level SRAM design, layout supervision, physical and logical verification, and debugging of SRAM macros. It also includes developing Python-based automation for SRAM compiler workflows, optimizing designs for power, performance, and area across advanced process nodes, and collaborating with SoC, silicon validation, and product teams. Candidates should have 5+ years of SRAM design experience, strong digital circuit and FinFET process knowledge, scripting skills, and experience delivering production-ready designs.

Responsibilities

Embedded SRAM design: Transistor-level circuit design, supervising layout implementation, physical and logical verification, and debug of SRAM macros.
SRAM compiler development: Envisioning, defining, and coding more efficient ways to automate the simultaneous assembly and validation of multiple unique SRAM macros using NVIDIA's extensive compute resources.
Advanced development: Exploring the potential of future process nodes and developing techniques to achieve optimal power, performance, and area characteristics.
Guiding SOC design, silicon test, and productization efforts: Collaborate with SOC design partners to help them achieve their overall performance and cost goals, guide the silicon test and characterization efforts, and working with productization teams to prepare new silicon for the demanding requirements of real-world applications.

Skills & Experience

Btech, Mtech or PhD preferred
5+ years of SRAM design experience with a strong background in digital circuit design, layout, and validation on advanced FinFET processes
Prior design experience in single-port, dual-port, or register file SRAM-based macros required, including complex circuits like self-timed logic and sense-amplifiers
Python scripting ability to parse data and automate tasks
Successful track record of delivering designs to production
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