S
Lead Software Engineer
Accepting applicationsSourcebae · India
Contract Mid_senior AnalogCadenceMentorMixed-SignalPerl
Estimated market salary
βΉ30-54 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
5d ago
Category
Verification
Experience
Mid_senior
Country
India
π¨ Hiring: Lead AMS Verification Engineer | Bangalore
We are looking for an experienced Lead AMS Verification Engineer to join a leading semiconductor team in Bangalore.
π Location: Bangalore
πΌ Experience: 8+ Years
πΉ Key Skills:
AMS Verification
Mixed-Signal Simulation
UVM / UVM-AMS
SystemVerilog
Verilog-A / AMS
SV-RNM
SPICE Simulations
Cadence Virtuoso, Xcelium
Synopsys VCS
Python / Perl / TCL Scripting
AMS SoC/IP Verification
πΉ Responsibilities:
Lead AMS verification activities for SoC/IP designs
Develop and maintain AMS verification methodologies and flows
Perform mixed-signal simulations, debugging, and root-cause analysis
Collaborate with Analog and Digital Design teams
Drive automation, regression management, and verification efficiency
Mentor engineers and provide technical leadership
β Preferred:
Experience with UVM-AMS environments
AMS SoC-level verification experience
Team leadership and mentoring experience
If you have a strong background in AMS verification and are looking for your next opportunity, I'd love to connect.
π© Please share your updated resume at ila_upadhyay@sourcebae.com or apply via the link below.
#Hiring #AMSVerification #MixedSignalVerification #SemiconductorJobs #UVM #SystemVerilog #VerilogAMS #ASICVerification #VLSIJobs #BangaloreJobs #EngineeringJobs #Semiconductor
Show more Show less
We are looking for an experienced Lead AMS Verification Engineer to join a leading semiconductor team in Bangalore.
π Location: Bangalore
πΌ Experience: 8+ Years
πΉ Key Skills:
AMS Verification
Mixed-Signal Simulation
UVM / UVM-AMS
SystemVerilog
Verilog-A / AMS
SV-RNM
SPICE Simulations
Cadence Virtuoso, Xcelium
Synopsys VCS
Python / Perl / TCL Scripting
AMS SoC/IP Verification
πΉ Responsibilities:
Lead AMS verification activities for SoC/IP designs
Develop and maintain AMS verification methodologies and flows
Perform mixed-signal simulations, debugging, and root-cause analysis
Collaborate with Analog and Digital Design teams
Drive automation, regression management, and verification efficiency
Mentor engineers and provide technical leadership
β Preferred:
Experience with UVM-AMS environments
AMS SoC-level verification experience
Team leadership and mentoring experience
If you have a strong background in AMS verification and are looking for your next opportunity, I'd love to connect.
π© Please share your updated resume at ila_upadhyay@sourcebae.com or apply via the link below.
#Hiring #AMSVerification #MixedSignalVerification #SemiconductorJobs #UVM #SystemVerilog #VerilogAMS #ASICVerification #VLSIJobs #BangaloreJobs #EngineeringJobs #Semiconductor
Show more Show less
Similar Jobs
G
Werkstudent*in fΓΌr Silicon Validation
GlobalFoundries · Dresden, Germany, Europe
M
Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)
Marvell · Santa Clara, United States, North America
N
Software Engineer β Hardware Design Verification
NXP · Kanata
Q
CPU Post-Silicon Validation Engineer
Qualcomm · Santa Clara, CA