CT
Lead SOC Design Verification ENgineer
Accepting applicationsChiplogic Technologies · Bengaluru, Karnataka, India
Full-Time Mid_senior AIPerlPythonRTLSOC
Estimated market salary
₹20-37 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
India
Company Description Chiplogic Technologies is an IP and product engineering services company founded in 2018, specializing in Semiconductor, Systems, IoT, and AI/ML domains. The organization delivers high-quality, dependable engineering solutions, supporting customers from concept to silicon and full turnkey semiconductor design. Chiplogic also offers proof-of-concept development and complete IoT system solutions. In the AI/ML area, the company builds services around its proprietary VISARD™ (Video Synthesis And Real-time Dynamics) framework, enabling advanced, real-time video and system dynamics applications.
Role Description As a Lead SOC Design Verification Engineer, you will be responsible for driving verification strategy and execution for complex SOC designs in an on-site, full-time role based in Bengaluru. You will develop and maintain verification plans, create testbenches, write test cases, and build coverage models to ensure design quality and functional correctness. You will lead functional and formal verification activities, manage debugging of issues, and collaborate closely with RTL design engineers and architects to resolve defects and improve design robustness. The role includes mentoring junior team members, reviewing verification deliverables, optimizing verification methodologies, and contributing to continuous process improvements. You will work with cross-functional teams to support tape-out schedules and ensure verification milestones are met.
Qualifications
Strong expertise in Functional Verification, including testbench development, test case creation, and coverage-driven verification.
The Ideal candidate should have 10+ years of experience in SOC.
Proficiency in Formal Verification techniques and tools, with experience applying them to complex SOC blocks and subsystems.
Solid background in RTL Design, with the ability to understand and review RTL code and provide feedback to design teams.
Good understanding of Computer Architecture concepts such as memory systems, buses, pipelines, and SOC-level integration.
Advanced Debugging skills for identifying, analyzing, and resolving design and verification issues using simulation and waveform tools.
Experience with industry-standard verification methodologies (e.g., UVM), simulators, and scripting languages (such as Python, Perl, or Shell).
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related field.
Proven experience leading verification teams or projects in semiconductor or SOC design environments, with strong communication and collaboration skills.
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Role Description As a Lead SOC Design Verification Engineer, you will be responsible for driving verification strategy and execution for complex SOC designs in an on-site, full-time role based in Bengaluru. You will develop and maintain verification plans, create testbenches, write test cases, and build coverage models to ensure design quality and functional correctness. You will lead functional and formal verification activities, manage debugging of issues, and collaborate closely with RTL design engineers and architects to resolve defects and improve design robustness. The role includes mentoring junior team members, reviewing verification deliverables, optimizing verification methodologies, and contributing to continuous process improvements. You will work with cross-functional teams to support tape-out schedules and ensure verification milestones are met.
Qualifications
Strong expertise in Functional Verification, including testbench development, test case creation, and coverage-driven verification.
The Ideal candidate should have 10+ years of experience in SOC.
Proficiency in Formal Verification techniques and tools, with experience applying them to complex SOC blocks and subsystems.
Solid background in RTL Design, with the ability to understand and review RTL code and provide feedback to design teams.
Good understanding of Computer Architecture concepts such as memory systems, buses, pipelines, and SOC-level integration.
Advanced Debugging skills for identifying, analyzing, and resolving design and verification issues using simulation and waveform tools.
Experience with industry-standard verification methodologies (e.g., UVM), simulators, and scripting languages (such as Python, Perl, or Shell).
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related field.
Proven experience leading verification teams or projects in semiconductor or SOC design environments, with strong communication and collaboration skills.
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