B
Lead /Senior Design Verification Engineer
Accepting applicationsBITSILICA · Hyderabad, Telangana, India
Full-Time Mid_senior ASICC++CadenceDDRETHERNET
Estimated market salary
₹11-21 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
4d ago
Category
Verification
Experience
Mid_senior
Country
India
About the job
Location: Bangalore and Hyderabad.
Experience: We are seeking individuals with 4 or more years of hands-on verification experience, with a primary focus on PCIe, DDR, ETHERNET, and CXL protocols.
Job Description:
Experience in IP/Subsystem/SOC ASIC Verification.
Hands-on expertise of working on Test Plan & Test bench development.
Proficient in writing test cases, simulation and debugging.
Experience in building Verification Environment from scratch using System-Verilog and methodologies like UVM.
Experience in developing Test Plan and Test Cases
Expertise in Coverage driven verification, Function coverage & Code coverage analysis
Hands on work experience on any of PCIe/Eth/USB/DDR/AXI etc
Experience With One Or more simulators from the major EDA suppliers (Cadence, Mentor Or Synopsys)
Good Software Skills In Object Oriented Programming (OOP), C, C++, Perl, Tcl.
Qualification: We require candidates with a Bachelor's or Master's degree in Electronics, VLSI, or Embedded Systems.
Interested can share your Resume with
Viswanadha.reddy@bitsilica.com
Show more Show less
Location: Bangalore and Hyderabad.
Experience: We are seeking individuals with 4 or more years of hands-on verification experience, with a primary focus on PCIe, DDR, ETHERNET, and CXL protocols.
Job Description:
Experience in IP/Subsystem/SOC ASIC Verification.
Hands-on expertise of working on Test Plan & Test bench development.
Proficient in writing test cases, simulation and debugging.
Experience in building Verification Environment from scratch using System-Verilog and methodologies like UVM.
Experience in developing Test Plan and Test Cases
Expertise in Coverage driven verification, Function coverage & Code coverage analysis
Hands on work experience on any of PCIe/Eth/USB/DDR/AXI etc
Experience With One Or more simulators from the major EDA suppliers (Cadence, Mentor Or Synopsys)
Good Software Skills In Object Oriented Programming (OOP), C, C++, Perl, Tcl.
Qualification: We require candidates with a Bachelor's or Master's degree in Electronics, VLSI, or Embedded Systems.
Interested can share your Resume with
Viswanadha.reddy@bitsilica.com
Show more Show less