Lead RTL Designer

The Role


We are seeking a Lead SoC Architect to transform ambiguous, high-level requirements into concrete, production-ready silicon designs. In this high-impact role, you will architect foundational silicon for next-generation AI infrastructure, directly shaping the trajectory of our technology and company. This is your opportunity to drive AI hardware from initial concept into the hands of global customers


What You’ll Do
Drive End-to-End Architecture: Lead the architectural definition of next-gen SoC and chiplet topologies optimized for AI inference platforms
Architect High-Speed Subsystems: Integrate cutting-edge interconnects (PCIe Gen6+, UCIe) and advanced memory architectures (HBM/DDR), driving performance modeling and controller integrati
Design Control Infrastructure: Define the control path, including CPU complexes, secure boot flows, and power/reset/clocking strategies
Collaborate Cross-Functionally: Partner closely with RTL, firmware, packaging, and validation teams across the entire product lifecycle
Lead Bring-Up & Optimization: Own the silicon bring-up strategy, post-silicon debug, and real-world performance tuning

What You Bring
Proven Track Record: Experience architecting and successfully shipping production-grade SoCs, ideally from early-stage or startup environments
Domain Expertise: Deep technical knowledge of high-speed IO, memory subsystems, and core SoC infrastructure
Pragmatic Engineering: A proven ability to balance complex PPA (power, performance, area), schedule, and cost trade-offs
Full-Lifecycle Experience: Comfort collaborating across hardware and firmware boundaries, from initial spec to final silicon validation
Bonus Points: Hands-on experience with multi-die/chiplet architectures, AI accelerators, GPUs, or high-bandwidth networking silicon
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