U
Lead FPGA Design Engineer
Accepting applicationsUST · Bengaluru, Karnataka, India
Full-Time Mid_senior ASICFPGAPCIeRTL
Estimated market salary
₹23-41 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
2 Jun
Category
Design
Experience
Mid_senior
Country
India
Role: FPGA Design Lead
Location: Bengaluru
The Opportunity: We are seeking a highly motivated and skilled FPGA Design Lead to join our dynamic team, working on state-of-the-art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.
Required Skills
:8+ years’ experience on Intel/Altera FPGAs (Agilex, Stratix-10, Arria-10
)Architecting FPGA systems with PCIe Gen4/Gen5 Hard I
PExpertise in Quartus Prime Pro, Platform Designer, timing closure, transceiver configuration Experience with NVMe/PCIe protocols, DMA engines, and high-speed digital desig
nOwnership of system architecture, FPGA design reviews, floorplanning, and integratio
nGuide team on RTL quality, CDC, SDC constraints, SignalTap debug, and performance optimization Strong understanding of FPGA, ASIC, RTL design principles and architectures
.
Qualificatio
n:Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related fiel
d.8+ years of experience in FPGA desig
n.
Show more Show less
Location: Bengaluru
The Opportunity: We are seeking a highly motivated and skilled FPGA Design Lead to join our dynamic team, working on state-of-the-art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.
Required Skills
:8+ years’ experience on Intel/Altera FPGAs (Agilex, Stratix-10, Arria-10
)Architecting FPGA systems with PCIe Gen4/Gen5 Hard I
PExpertise in Quartus Prime Pro, Platform Designer, timing closure, transceiver configuration Experience with NVMe/PCIe protocols, DMA engines, and high-speed digital desig
nOwnership of system architecture, FPGA design reviews, floorplanning, and integratio
nGuide team on RTL quality, CDC, SDC constraints, SignalTap debug, and performance optimization Strong understanding of FPGA, ASIC, RTL design principles and architectures
.
Qualificatio
n:Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related fiel
d.8+ years of experience in FPGA desig
n.
Show more Show less