SP
Lead Design Verification Engineers
Accepting applicationsSiMaxTech Pvt Ltd · Bengaluru South, Karnataka, India
Full-Time Mid_senior ASICAnalogRTLSoCSystemVerilog
Estimated market salary
₹27-49 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
19h ago
Category
Verification
Experience
Mid_senior
Country
India
Company Description SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions for global customers. The organization provides expertise across the full semiconductor design spectrum, including Analog Circuit Design, RTL Design, Design Verification, Custom Layout, Physical Design, AMS Verification, Embedded Design, and full-chip/SoC backend design. With deep experience from mature nodes (28nm, 40nm, 65nm and above) to advanced nodes (7nm, 5nm, 3nm) and emerging technologies such as 2nm and 18A, SiMaxTech supports next-generation, high-performance products. The company emphasizes continuous learning, innovation, and execution excellence to help customers achieve high quality and faster time-to-market. Its vision is to be the most preferred semiconductor design services partner worldwide, with a strong customer-centric focus on performance, reliability, and scalability.
We're Hiring,
Lead- Design Verification Engineers,
Experience:8+ Years
Location: Bangalore
Notice Period: Immediate - 30 Days
Role Description This is a full-time, on-site role for Lead Design Verification Engineers based in Bengaluru South. The role involves leading and executing block-level and SoC-level functional verification, including testbench architecture, test plan creation, and coverage-driven verification. Responsibilities include developing and maintaining verification environments using industry-standard methodologies (such as UVM), writing and reviewing test cases, and ensuring thorough coverage closure. The role also includes driving formal verification strategies for critical blocks, collaborating closely with RTL design, architecture, and physical design teams to resolve issues, and participating in design and verification reviews. The Lead Design Verification Engineer will mentor and guide junior engineers, contribute to verification methodology improvements, and support project planning, estimations, and status reporting.
Qualifications
Strong functional verification skills, including test plan development, constrained-random testing, coverage analysis, and closure using methodologies such as UVM.
Solid understanding of RTL Design and Computer Architecture to analyze specifications, review RTL, and collaborate effectively with design and architecture teams.
Experience with Formal Verification techniques and tools to validate critical design blocks and complement simulation-based verification.
Advanced Debugging skills for triaging simulation failures, identifying root causes, and working with cross-functional teams to implement robust fixes.
Proficiency in hardware description and verification languages (e.g., SystemVerilog, Verilog), and familiarity with industry-standard EDA tools for simulation and formal verification.
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field, with substantial experience in ASIC/SoC design verification.
Proven experience leading verification teams or projects, including mentoring team members and coordinating with stakeholders on schedules and deliverables.
Strong analytical, problem-solving, and communication skills, with the ability to document and
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We're Hiring,
Lead- Design Verification Engineers,
Experience:8+ Years
Location: Bangalore
Notice Period: Immediate - 30 Days
Role Description This is a full-time, on-site role for Lead Design Verification Engineers based in Bengaluru South. The role involves leading and executing block-level and SoC-level functional verification, including testbench architecture, test plan creation, and coverage-driven verification. Responsibilities include developing and maintaining verification environments using industry-standard methodologies (such as UVM), writing and reviewing test cases, and ensuring thorough coverage closure. The role also includes driving formal verification strategies for critical blocks, collaborating closely with RTL design, architecture, and physical design teams to resolve issues, and participating in design and verification reviews. The Lead Design Verification Engineer will mentor and guide junior engineers, contribute to verification methodology improvements, and support project planning, estimations, and status reporting.
Qualifications
Strong functional verification skills, including test plan development, constrained-random testing, coverage analysis, and closure using methodologies such as UVM.
Solid understanding of RTL Design and Computer Architecture to analyze specifications, review RTL, and collaborate effectively with design and architecture teams.
Experience with Formal Verification techniques and tools to validate critical design blocks and complement simulation-based verification.
Advanced Debugging skills for triaging simulation failures, identifying root causes, and working with cross-functional teams to implement robust fixes.
Proficiency in hardware description and verification languages (e.g., SystemVerilog, Verilog), and familiarity with industry-standard EDA tools for simulation and formal verification.
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field, with substantial experience in ASIC/SoC design verification.
Proven experience leading verification teams or projects, including mentoring team members and coordinating with stakeholders on schedules and deliverables.
Strong analytical, problem-solving, and communication skills, with the ability to document and
Show more Show less