Lead Design Verification Engineer

Lead Design Verification Engineer
Location: Hyderabad, India
Experience: 5–10 Years
Role Overview
We are seeking an experienced Verification Engineer to lead the verification of complex storage and high-speed interface IPs, subsystems, and SoCs. The ideal candidate will possess deep expertise in modern verification methodologies, strong protocol knowledge, and a proven track record of delivering high-quality silicon for advanced ASIC/SoC products.
Key Responsibilities
Lead end-to-end verification of NAND, DDR, PCIe, and NVMe-based IPs and subsystems.
Define and execute comprehensive verification strategies, test plans, and coverage closure methodologies at Block, Subsystem, and SoC levels.
Architect and develop robust, reusable UVM/SystemVerilog-based verification environments.
Drive functional verification using constrained-random, assertion-based, and coverage-driven methodologies.
Develop verification components including VIPs, scoreboards, monitors, checkers, assertions, and coverage models.
Analyze and debug complex RTL, protocol, and system-level issues to ensure design quality and schedule adherence.
Collaborate closely with Architecture, Design, Firmware, and Post-Silicon teams throughout the product development lifecycle.
Drive verification signoff based on functional, code, and assertion coverage metrics.
Provide technical leadership and mentorship to verification team members.
Required Qualifications
5–10 years of experience in ASIC/SoC Verification.
Strong expertise in IP, Block, and Subsystem Verification.
Expert-level proficiency in SystemVerilog and UVM.
Solid experience developing verification plans and executing verification closure activities.
Strong working knowledge of AXI and AHB protocols.
Hands-on verification experience with one or more of the following:
NAND / ONFI
DDR
PCIe
NVMe
Strong understanding of verification methodologies, simulation flows, and quality metrics.
Excellent debugging, analytical, and problem-solving capabilities.
Experience with industry-standard simulation and verification tools.
Preferred Qualifications
Scripting experience using Python and/or Perl.
Exposure to SoC integration, performance verification, or emulation environments.
Experience leading technical initiatives and mentoring engineers.
Education
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related discipline.
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