Lead ASIC Package Design Automation and AI Engineer

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The Role

We are seeking a highly motivated and seasoned engineer to support the package design organization in the development and deployment of AI-driven automation workflows. This role will focus on improving the efficiency, quality, and scalability of complex package, bridge, and interposer design.

The candidate will contribute to accelerating the design of advanced heterogeneous integration technologies, including substrates, silicon interposers, and bridge-based architectures, through automation, and AI-enabled methodologies. This role operates in a fast-paced, results-oriented environment and plays a critical part in enabling next-generation packaging innovation.

The Person

The ideal candidate :

Translate complex design challenges into scalable automation solutions
Work effectively across Design, EDA, and AI/ML teams
Demonstrate strong problem-solving skills and ownership mindset
Operate with limited supervision, delivering high-quality results aligned to project goals
The candidate should be comfortable working in a multi-disciplinary environment and have strong communication skills to collaborate across internal and external stakeholders.


Key Responsibilities

Develop, deploy, and maintain automation frameworks and AI-assisted workflows for Package substrates, silicon interposers and bridge-based integration.
Apply AI/ML methodologies to enhance key design activities such as auto-routing and placement optimization, signal integrity and power delivery improvements, design rule compliance and verification.
Collaborate with package design team to identify high-impact automation opportunities, reduce manual design effort and cycle time, improve design robustness and quality.
Partner with EDA tools teams and vendors to implement automation features, enhance tool capabilities and workflows, support next-generation advanced packaging design enablement
Develop automation and tools to enable design flow integration, data extraction and analysis, closed-loop optimization with simulation teams
Support execution of design milestones and tape-outs, ensuring automation readiness and quality
Contribute to documentation, best practices, and reusable workflows for broader team adoption


Preferred Experience

Experience in semiconductor packaging or SOC physical design automation
Strong working knowledge of EDA packaging tools such as Cadence APD / SiP, Siemens Xpedition and Synopsys 3DICC or equivalent
Expertise in scripting and automation using Python (preferred), Tcl, SKILL, or C++
Experience applying AI/ML techniques to engineering or design workflows. Familiarity with frameworks such as PyTorch or TensorFlow .
Understanding of advanced packaging technologies such as 2.5D / 3D IC, Chiplets and heterogeneous integration, Bridge/interposer-based architectures
Familiarity with Design verification flows (DRC/LVS), Parasitic extraction and SI/PI fundamentals
Experience working with cross-functional teams (Design, SI/PI, Mechanical, EDA)


Academic Credentials

Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, Computer Science or related field.


This role is not eligible for visa sponsorship

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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