MT
IO Design Architecture Expert
Accepting applicationsMulya Technologies · Greater Bengaluru Area
Full-Time Mid_senior PCIeSoC
Posted
6d ago
Category
Design
Experience
Mid_senior
Country
India
IO Design Architecture Expert
Fortune 100 Organization
Location: Bangalore
Your Role And Responsibilities
We are seeking an experienced IO Design Architecture Expert to define, develop, and document chip‑level architecture for high‑performance IO bridges—such as PCIe bridges—within server‑class processor designs.
Key Responsibilities
Architect and specify IO subsystem components, with a focus on PCIe and other server‑grade IO bridges.
Develop detailed architectural descriptions, interface definitions, and micro‑architecture guidance for implementation teams.
Collaborate with cross‑functional teams to ensure architectural integrity and compliance with industry standards.
Required Technical And Professional Expertise
10-18+ years of strong understanding of major IO and interconnect standards, including PCIe, PCI‑X, CXL, and related protocols.
Proficiency in:
MSI and LSI interrupt mechanisms
TCEs (Translation Control Entries)
DMA ordering rules and transaction flows
MMIO address mapping and access semantics
Address Translation Services (ATS) and related coherency/translation features
Ability to translate architectural requirements into clear specifications used by design, verification, and firmware teams.
Proven experience in server‑class SoC or IO subsystem design is highly desirable.
Contact
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
https://mulyatech.com/
Show more Show less
Fortune 100 Organization
Location: Bangalore
Your Role And Responsibilities
We are seeking an experienced IO Design Architecture Expert to define, develop, and document chip‑level architecture for high‑performance IO bridges—such as PCIe bridges—within server‑class processor designs.
Key Responsibilities
Architect and specify IO subsystem components, with a focus on PCIe and other server‑grade IO bridges.
Develop detailed architectural descriptions, interface definitions, and micro‑architecture guidance for implementation teams.
Collaborate with cross‑functional teams to ensure architectural integrity and compliance with industry standards.
Required Technical And Professional Expertise
10-18+ years of strong understanding of major IO and interconnect standards, including PCIe, PCI‑X, CXL, and related protocols.
Proficiency in:
MSI and LSI interrupt mechanisms
TCEs (Translation Control Entries)
DMA ordering rules and transaction flows
MMIO address mapping and access semantics
Address Translation Services (ATS) and related coherency/translation features
Ability to translate architectural requirements into clear specifications used by design, verification, and firmware teams.
Proven experience in server‑class SoC or IO subsystem design is highly desirable.
Contact
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
https://mulyatech.com/
Show more Show less
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