Immediate hiring for RTL Design Engineers for BLR Location

Hi All,

I have an immediate requirements ( RTL Design) for one of our client in BLR Location

.
Exp - 5+ years
Location - BLR
Client - Product Client
NP- Immediate to 15 days ( Max)

JD
Strong RTL Design experience using Verilog/System Verilog
Hands-on experience in Micro-Architecture and RTL implementation
Experience with PCIe and/or CXL protocols (Mandatory)
Knowledge of AXI, CDC, FSMs, Pipeline design
Experience in RTL-to-GDS flow and design reviews
Exposure to SpyGlass, Design Compiler/Fusion Compiler is preferred


Interested candidates, Kindly share with me your updated profile to anand.arumugam@modernchipsolutions.com or Ping me 9900927620 for detailed discussion
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