ST
IC Layout Engineer
Accepting applicationsSaika Technologies Inc · San Francisco Bay Area
Full-Time Entry CadenceMentorRFSynopsysanalog
Posted
21h ago
Category
Design
Experience
Entry
Country
United States
Company Description Saika Technologies Inc is a United States–based computer software company focused on delivering technology solutions for complex engineering and design challenges. The organization operates at the intersection of software and semiconductor innovation, offering products and services that support integrated circuit development. Team members collaborate in a fast-paced, technical environment with opportunities to work on cutting-edge tools and workflows. The company values problem-solving, precision, and continuous improvement, creating space for professionals to grow their skills and contribute to impactful projects.
Role Description The IC Layout Engineer will be responsible for creating, optimizing, and validating physical layouts for analog, digital, and mixed-signal integrated circuits. Day-to-day work includes translating schematic designs into layout, performing floorplanning, placement, routing, and layout parasitic extraction, while ensuring adherence to foundry design rules and best practices. The engineer will collaborate closely with circuit designers, verification engineers, and CAD teams to resolve layout-related issues, improve performance, and meet area, power, and timing targets. Typical tasks include running DRC/LVS checks, reviewing design constraints, updating layouts based on feedback, and documenting layout methodologies and standards. This is a full-time, on-site role located in the San Francisco Bay Area.
Qualifications
Strong knowledge of IC layout methodologies for analog, digital, and mixed-signal circuits, including floorplanning, placement, and routing.
Proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Synopsys, Mentor/Siemens tools) and experience running DRC, LVS, and other physical verification checks.
Understanding of semiconductor process technologies, design rules, and constraints for advanced nodes, and familiarity with foundry PDKs.
Ability to interpret circuit schematics, work closely with design and verification engineers, and incorporate feedback into layout iterations.
Strong analytical and problem-solving skills, attention to detail, and ability to manage multiple layout tasks and deadlines.
Effective written and verbal communication skills and a collaborative approach to working in cross-functional teams.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
Prior experience in IC layout for production silicon; exposure to high-speed, low-power, or RF layouts is a plus.
Show more Show less
Role Description The IC Layout Engineer will be responsible for creating, optimizing, and validating physical layouts for analog, digital, and mixed-signal integrated circuits. Day-to-day work includes translating schematic designs into layout, performing floorplanning, placement, routing, and layout parasitic extraction, while ensuring adherence to foundry design rules and best practices. The engineer will collaborate closely with circuit designers, verification engineers, and CAD teams to resolve layout-related issues, improve performance, and meet area, power, and timing targets. Typical tasks include running DRC/LVS checks, reviewing design constraints, updating layouts based on feedback, and documenting layout methodologies and standards. This is a full-time, on-site role located in the San Francisco Bay Area.
Qualifications
Strong knowledge of IC layout methodologies for analog, digital, and mixed-signal circuits, including floorplanning, placement, and routing.
Proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Synopsys, Mentor/Siemens tools) and experience running DRC, LVS, and other physical verification checks.
Understanding of semiconductor process technologies, design rules, and constraints for advanced nodes, and familiarity with foundry PDKs.
Ability to interpret circuit schematics, work closely with design and verification engineers, and incorporate feedback into layout iterations.
Strong analytical and problem-solving skills, attention to detail, and ability to manage multiple layout tasks and deadlines.
Effective written and verbal communication skills and a collaborative approach to working in cross-functional teams.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
Prior experience in IC layout for production silicon; exposure to high-speed, low-power, or RF layouts is a plus.
Show more Show less